Modelling of differential single difference receiver clock bias for precise positioning

Abstract

A receiver hardware delay should be seriously considered for time-transfer and determination of ionospheric delay corrections for wide area differential GPS positioning. A receiver hardware delay does not generally effect the common geo-position application, as suitable differences of observations are used, or equivalently, clock error parameters are introduced, epoch-wise, that also absorb the delays. This paper investigates the behavior of inter-frequency (or observation-type) receiver hardware delays by using a single difference (SD) model, which estimates the receiver delay along with the receiver clock error (and SD ambiguities of a reference satellite with carrier phase observations) for zero and short baselines. The purpose of this paper is to model the between-observation-type delays for the purpose of precise positioning, under practical circumstances. The focus is on data series of differential SD receiver clock biases, since they reflect the behavior of receiver hardware delays with time. A simple linear regression of the data series is employed to study the behavior, and test statistics are employed to assess both the significance of the parameters and the observations’ fit for the linear regression. The statistical analysis results indicate that almost all inter-observation type receiver delays can be modeled as the sum of a constant (offset) and a constant rate of change (slope). The analysis shows that the differential receiver delay is generally at the mm- to cm-level on phase, while at the dm-level on code for the equipment used in the experiments.