Program sketching

Abstract

Sketching is a synthesis methodology that aims to bridge the gap between a programmer’s high-level insights about a problem and the computer’s ability to manage low-level details. In sketching, the programmer uses a partial program, a sketch, to describe the desired implementation strategy, and leaves the low-level details of the implementation to an automated synthesis procedure. In order to generate an implementation from the programmer provided sketch, the synthesizer uses counterexample-guided inductive synthesis (CEGIS). Inductive synthesis refers to the process of generating candidate implementations from concrete examples of correct or incorrect behavior. CEGIS combines a SAT-based inductive synthesizer with an automated validation procedure, a bounded model-checker, that checks whether the candidate implementation produced by inductive synthesis is indeed correct and to produce new counterexamples. The result is a synthesis procedure that is able to handle complex problems from a variety of domains including ciphers, scientific programs, and even concurrent data-structures.

This is a preview of subscription content, access via your institution.

References

  1. 1

    Amit, D., Rinetzky, N., Sagiv, M., Yahav, E.: Comparison under abstraction for verifying linearizability. In: In 19th International Conference on Computer Aided Verification (CAV) (2007)

  2. 2

    Anderson, S.E.: Bit twiddling hacks (1997–2005). http://www-graphics.stanford.edu/~seander/bithacks.html

  3. 3

    Angluin D., Smith C.H.: Inductive inference: theory and methods. ACM Comput. Surv. 15(3), 237–269 (1983)

    MathSciNet  Article  Google Scholar 

  4. 4

    Biere, A.: Resolve and expand. In: Proceedings of the 7th International Conference on Theory and Applications of Satisfiability Testing, SAT’04, pp. 59–70. Springer, Berlin (2005)

  5. 5

    Clarke E., Grumberg O., Jha S., Lu Y., Veith H.: Counterexample-guided abstraction refinement for symbolic model checking. J. ACM 50(5), 752–794 (2003)

    MathSciNet  Article  Google Scholar 

  6. 6

    Clarke, E., Kroening, D.,Yorav, K.: Behavioral consistency of c and verilog programs using bounded model checking. In: Proceedings of the 40th Annual Design Automation Conference, DAC ’03, pp. 368–371. ACM, New York (2003)

  7. 7

    Advanced Encryption Standard (AES): U.S. DEPARTMENT OF COMMERCE/National Institute of Standards and Technology, November (2001). http://csrc.nist.gov/publications/fips/fips197/fips-197.pdf

  8. 8

    Gold E.M.: Language identification in the limit. Inf. Control 10(5), 447–474 (1967)

    Article  MATH  Google Scholar 

  9. 9

    Jha, S., Gulwani, S., Seshia, S.A., Tiwari, A.: Oracle-guided component-based program synthesis. In: Proceedings of the 32nd ACM/IEEE International Conference on Software Engineering, ICSE ’10, vol. 1, pp. 215–224. ACM, New York (2010)

  10. 10

    McMillan, K.L.: Symbolic Model Checking. Kluwer Academic Publishers (1993)

  11. 11

    Mishchenko, A., Chatterjee, S., Brayton, R.: Dag-aware AIG rewriting: a fresh look at combinational logic synthesis. In: DAC ’06: Proceedings of the 43rd Annual Conference on Design Automation, pp. 532–535. ACM Press, New York (2006)

  12. 12

    Ranjan, D.P., Tang, D., Malik, S.: A comparative study of 2qbf algorithms. In: The Seventh International Conference on Theory and Applications of Satisfiability Testing (SAT 2004), May (2004)

  13. 13

    Samulowitz, H., Bacchus, F.: Binary clause reasoning in qbf. In: Proceedings of the 9th International Conference on Theory and Applications of Satisfiability Testing, SAT’06, pp. 353–367. Springer, Berlin (2006)

  14. 14

    Sen, K., Marinov, D., Agha, G.: Cute: a concolic unit testing engine for c. In: ESEC/SIGSOFT FSE, pp. 263–272 (2005)

  15. 15

    Shapiro E.Y.: Algorithmic Program Debugging. MIT Press, Cambridge (1983)

    Google Scholar 

  16. 16

    Solar-Lezama A.: Program Synthesis By Sketching. PhD thesis, EECS, UC Berkeley (2008)

  17. 17

    Solar-Lezama, A., Arnold, G., Tancau, L., Bodík, R., Saraswat, V., Seshia, S.: Sketching stencils. In: PLDI ’07: Proceedings of the 2007 ACM SIGPLAN Conference on Programming Language Design and Implementation, vol. 42, pp. 167–178. ACM, New York (2007)

  18. 18

    Solar-Lezama, A., Jones, C., Arnold, G., Bodík, R.: Sketching concurrent datastructures. In: Proceedings of the ACM SIGPLAN 2008 Conference on Programming Language Design and Implementation. Tucson, June 7–13 (2008)

  19. 19

    Solar-Lezama, A., Tancau, L., Bodík, R., Saraswat, V., Seshia, S.: Combinatorial sketching for finite programs. In: ASPLOS’06. ACM Press, San Jose (2006)

  20. 20

    Srivastava S., Gulwani S., Foster J.: From program verification to program synthesis. POPL, Madrid (2010)

    Google Scholar 

  21. 21

    Summers P.D.: A methodology for lisp program construction from examples. J. ACM 24(1), 161–175 (1977)

    MathSciNet  Article  MATH  Google Scholar 

  22. 22

    Wintersteiger, C.M., Hamadi, Y., de Moura, L.M.: Efficiently solving quantified bit-vector formulas. In: Bloem, R., Sharygina, N. (eds.) FMCAD, pp. 239–246. IEEE (2010)

  23. 23

    Xie, Y., Aiken, A.: Scalable error detection using boolean satisfiability. In: Proceedings of the 32nd ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages (POPL), pp. 351–363 (2005)

Download references

Author information

Affiliations

Authors

Corresponding author

Correspondence to Armando Solar-Lezama.

Rights and permissions

Reprints and Permissions

About this article

Cite this article

Solar-Lezama, A. Program sketching. Int J Softw Tools Technol Transfer 15, 475–495 (2013). https://doi.org/10.1007/s10009-012-0249-7

Download citation

Keywords

  • SAT/SMT applications
  • Constraint-based synthesis
  • Sketching
  • Synthesis