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Design of memristor based low power and highly reliable ReRAM cell

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A CNFET-based nonvolatile 4CNFET2M resistive RAM (ReRAM) cell is proposed in this paper. In this design, four CNFETs are employed as high-speed, low power and high endurance switches while the two memristors constitute the memory element. In this paper, the proposed 4CNFET2M ReRAM has been compared with the standard 6T SRAM (S6T) cell and the contemporary 2T2M ReRAM cell. The proposed cell shows 1.68 ×/2.14 × shorter read delay (TRA) when compared to S6T/2T2M while exhibiting 4.16 × shorter write delay (TWA) than that of 2T2M @ VDD = 1 V. Moreover, at VDD = 1 V, it displays a 2.32 × narrower spread in TWA than 2T2M as well as 8.0 ×/7.25 × narrower spread in TRA than that of S6T/2T2M. The proposed cell consumes 2.57 × 106 ×/2.70 × lower hold power (HPWR) than that of S6T/2T2M at VDD = 1 V. In addition, it exhibits tolerance to variations in temperature as well as pitch and Vth of memristor. All this is achieved at a 32.44 × penalty in TWA when compared to S6T. The use of CNFET devices, which possess far superior electrical characteristics in comparison to traditional CMOS devices, integrated with memristor technology, paves the way for such major improvements in design metrics of the proposed cell.

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Authors and Affiliations

  1. Department of Electronic and Computer Engineering, The Hong Kong University of Science and Technology, Clear Water Bay, Hong Kong

    Soumitra Pal

  2. Department of Electronics and Communication Engineering, Birla Institute of Technology, Mesra, Ranchi, Jharkhand, 835215, India

    Subhankar Bose & Aminul Islam

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  1. Soumitra Pal
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Correspondence to Aminul Islam.

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Pal, S., Bose, S. & Islam, A. Design of memristor based low power and highly reliable ReRAM cell. Microsyst Technol 28, 793–807 (2022). https://doi.org/10.1007/s00542-019-04582-1

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