Abstract
This paper presents a reversible image watermarking (RIW) method including an adaptive feedback part based on difference expansion (DE). With respect to some parameters of the image, peak signal to noise ratio (PSNR), the highest payload capacity and the corresponding embedding threshold are spontaneously calculated by using the proposed adaptive feedback-based reversible Image watermarking (AFRIW). The payload capacity for data embedding is briefly explained. The machinery part of the adaptive feedback for controlling the payload capacity is presented. Software verification of three cover images is presented. Based on some image parameters, the comparative result between the proposed AFRIW algorithm and DE-based RIW method is presented. This paper also presents the VLSI architecture of this proposed algorithm for RIW. The proposed architecture has been implemented using VIVADO 2016.2 based on Xilinx Virtex-7 FPGA and Zynq device platforms. The software implementation results clearly demonstrated that the AFRIW method provides higher PSNR than the DE-based RIW method. The hardware implementation results indicate that the proposed algorithm has low timing complexity over other existing feedback based RIW algorithms which in turn provide higher speed.
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Acknowledgement
The authors would like to thank the Special Manpower Development Programme-Chip to System Design (SMDP-C2SD) sponsored by Ministry of Electronics and Information Technology (MeitY) for providing financial assistance to carry out the research work.
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Das, S., Singh, P. & Koley, C. Hardware implementation of adaptive feedback based reversible image watermarking for image processing application. Microsyst Technol 26, 3271–3287 (2020). https://doi.org/10.1007/s00542-018-4024-x
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DOI: https://doi.org/10.1007/s00542-018-4024-x