Abstract
Static and transfer characteristics of single electron transistor are analytically calculated as a function of operating temperature under suitable biasing conditions. Computation is carried out assuming quantum mechanical coupling between source and drain; along with stochastic nature of tunneling process. Fermi Golden Rule is used to calculate free energy changes at both source and drain ends, and corresponding tunneling probabilities, which are governing factor for determining drain current. Result shows that significant variation is observed at lower temperature operation in terms of drain current and differential conductance. It is found out that at low horizontal bias, transfer characteristics is greatly influenced at lower temperature, whereas moderate gate voltage is required to observe meaningful fluctuations in static characteristics. Magnitudes of differential conductance and transconductance increase at higher temperature. Results have critical importance for operation of the device at different temperature conditions.
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References
Abdulrazzaq BI, Halin IA, Kawahito S, Sidek RM, Shafie S, Md Yunus N A (2016) A review on high-resolution CMOS delay lines: towards sub-picosecond jitter performance. SpringerPlus 5:434
Abhinav EM, Kavuri SN, Kumar TS, Thirupathi M, Mohan MC, Reddy AS (2016) Analysis of molecular single-electron transistors using silicene, graphene and germanene. In: Proceedings of the second international conference on computer and communication technologies: advances in intelligent systems and computing, vol 379
Abhinav EM, Mohan MC, Reddy AS, Chary V, Thirupathi M (2016) Analysis of organic molecular single-electron transistor using c4h6b2 with different metal electrodes. In: Proceedings of the second international conference on computer and communication technologies: advances in intelligent systems and computing, vol 379
Dagesyan SA, Shorokhov VV, Presnov DE, Soldatov ES, Trifonov AS, Krupenin VA (2017) Sequential reduction of the silicon single-electron transistor structure to atomic scale. Nanotechnology 28(22):225304
Deyasi A, Chakraborty R (2017) Analytical computation of transconductance characteristics of single electron transistor. In: IEEE international conference on electronics, materials engineering and nano-technology, pp 1–4
Droulers G, Ecoffey S, Drouin D, Pioro-Ladriere M (2016) A manufacturable process for single electron charge detection, a step towards quantum computing. In: 46th European solid-state device research conference, pp 337–340
Hu CH, Jiang JF, Cai QY (2002) A single-electron-transistor based analog/digital converter. In: Second IEEE conference on nanotechnology, pp 487–490
Huang KD, Lin JT, Hu SF, Sung CL (2006) The fabrication of single electron transistor by polysilicon thin film and point-contact lithography. In: 25th international conference on microelectronics, pp 149–152
Karbasian G, McConnell MS, George H, Schneider LC, Filmer MJ, Orlov AO, Nazarov AN, Snider GL (2017) Metal-insulator-metal single electron transistors with tunnel barriers prepared by atomic layer deposition. Appl Sci 7:246
Khan MHA (2015) Single-electron transistor based implementation of NOT, Feynman, and Toffoli Gates. In: IEEE international symposium on multiple-valued logic, pp 66–71
Knobel RG, Cleland AN (2003) Nanometre-scale displacement sensing using a single electron transistor. Nature 424:291–293
Krout I, Touati MA, Boubaker A, Sghaier N, Kalboussi A (2011) Drain current model for single electron transistor operating at high temperature. In: 8th international multi-conference on systems, signals and devices, pp 1–4
Kumar O, Kaur M (2010) Single electron transistor: applications and problems. Int J VLSI Des Commun Syst 1(4):24–29
Kumar S, Sharma R (2015) Design space exploration of nanoscale interconnects with rough surfaces. In: IEEE electrical design of advanced packaging and systems symposium, pp 125–128
Mahapatra S, Ionescu AM, Banerjee K, Declerq MJ (2002) Modeling and analysis of power dissipation in single electron logic. In: IEDM Tech Dig, pp 323–326
Mukherjee S, Jana A, Sarkar SK (2015) Hybrid single electron transistor based low power consuming odd parity generator and parity checker circuit in 22 nm technology. In: Jain L, Behera H, Mandal J, Mohapatra D (eds) Computational intelligence in data mining—smart innovation, systems and technologies, vol 31. Springer, New York
Nakajima A (2016) Application of single-electron transistor to biomolecule and ion sensors. Appl Sci 6:94
Seike K, Kanai Y, Ohno Y, Maehashi K, Inoue K, Matsumoto K (2015) Carbon nanotube single-electron transistors with single-electron charge storages. Jpn J Appl Phys 54(6S1):06FF05
Takiguchi M, Shimada H, Mizugaki Y (2016) Sharp switching characteristics of single electron transistor with discretized charge input. Appl Sci 6:214
Talukdar B, Pradhan PC, Agarwal A (2016) Design of different digital circuits using single electron devices. Adv Mater Sci Eng 3(1):21–37
Touati A, Chatbouri S, Sghaier N, Kalboussi A (2012) New model for drain and gate current of single-electron transistor at high temperature. World J Nano Sci Eng 2:171–175
Uchida K (2000) Analytical single-electron transistor (SET) model for design and analysis of realistic SET circuits. Jpn J Appl Phys Part 1 39:2321–2324
Wagner T, Bayer JC, Rugeramigabo EP, Haug RJ (2017) Optimal single-electron feedback control. Phys Status Solid 254:600701
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Deyasi, A., Sarkar, A. Effect of temperature on electrical characteristics of single electron transistor. Microsyst Technol 25, 1875–1880 (2019). https://doi.org/10.1007/s00542-018-3725-5
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DOI: https://doi.org/10.1007/s00542-018-3725-5