Diagnosis and optimization of a power distribution network by extracting its parasitic inductances and building a lumped circuit model

Abstract

Design of power distribution networks (PDNs) in high speed digital circuit has become a more challenging task in view of decreasing supply voltages and increasing transient currents. The parasitic inductance of a PDN is the most crucial parameter that limits high frequency performance. In this paper, a specific PDN on printed circuit board (PCB), with multiple supply voltages, is diagnosed and optimized. A simple method is developed to extract the parasitic inductances of the PDN by examining the Y parameters. An equivalent lumped circuit model is built to interpret the input impedance curve of the PDN. Based on this model, a simpler circuit model is presented. Predictions based on the simple circuit model are in agreement with the field simulated performance of the whole structure and with measured results. The performance of the PDN can be improved by optimizing segmentation and distribution of power planes along with strategic placement of decoupling capacitors. It is crucial for PDN design to decrease the parasitic inductance between power/ground pads on PCB and their junction points to PDN power/ground pairs.