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Glass frit bonding: an universal technology for wafer level encapsulation and packaging

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Abstract

This paper reports on glass frit wafer bonding, which is a universally usable technology for wafer level encapsulation and packaging. After explaining the principle and the process flow of glass frit bonding, experimental results are shown. Glass frit bonding technology enables bonding of surface materials commonly used in MEMS technology. It allows hermetic sealing and a high process yield. Metal lead throughs at the bond interface are possible, because of the planarizing glass interlayer. Examples of surface micromachined sensors demonstrate the potential of glass–frit bonding.

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References

  1. MEMS and Sensor Materials 11–036 Sealing glass (2002) Specification FERRO Electronic Materials Santa Babara, Ca, Rev. 1200

  2. HVG Fortbildungskurs (1995) Fügen von Glas. Verlag der Deutschen Glastechnischen Gesellschaft Frankfurt Main 1995 ISBN 3-921089-14-X

  3. Zinke A (1961) Technologie der Glasverschmelzungen. Technisch-physikalische Monographien Band 12, Leipzig 1996 Akademische Verlagsgesellschaft Geest und Portig K.-G

  4. Knechtel R, Heller J, Wiemer M, Frömel J (2003) “Silicon wafer bonding for encapsulating surface micromechanical systems using intermediate glass layers. In: Semiconductor wafer bonding VII, science, technology and applications, proceedings of the 203rd meeting ECS, Paris

  5. Knechtel R (2003) Wafer level encapsulation of surface micromechanical sensors demands and solution. In: Proceedings of the micro system technologies, München

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Acknowledgments

The author would like thank Mr. M. Wiemer and Mr. J. Frömel, Fraunhofer Institute for Reliability and Micro Integration Chemnitz for cooperation and optimizing the screen printing process. I would also like to thank the colleagues at X-FAB for the help and support during the development of the glass frit bonding technology.

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Correspondence to Roy Knechtel.

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Knechtel, R. Glass frit bonding: an universal technology for wafer level encapsulation and packaging. Microsyst Technol 12, 63–68 (2005). https://doi.org/10.1007/s00542-005-0022-x

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  • DOI: https://doi.org/10.1007/s00542-005-0022-x

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