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Dynamic hardware system for cascade SVM classification of melanoma

  • Shereen AfifiEmail author
  • Hamid GholamHosseini
  • Roopak Sinha
Original Article
  • 83 Downloads

Abstract

Melanoma is the most dangerous form of skin cancer, which is responsible for the majority of skin cancer-related deaths. Early diagnosis of melanoma can significantly reduce mortality rates and treatment costs. Therefore, skin cancer specialists are using image-based diagnostic tools for detecting melanoma earlier. We aim to develop a handheld device featured with low cost and high performance to enhance early detection of melanoma at the primary healthcare. But, developing this device is very challenging due to the complicated computations required by the embedded diagnosis system. Thus, we aim to exploit the recent hardware technology in reconfigurable computing to achieve a high-performance embedded system at low cost. Support vector machine (SVM) is a common classifier that shows high accuracy for classifying melanoma within the diagnosis system and is considered as the most compute-intensive task in the system. In this paper, we propose a dynamic hardware system for implementing a cascade SVM classifier on FPGA for early melanoma detection. A multi-core architecture is proposed to implement a two-stage cascade classifier using two classifiers with accuracies of 98% and 73%. The hardware implementation results were optimized by using the dynamic partial reconfiguration technology, where very low resource utilization of 1% slices and power consumption of 1.5 W were achieved. Consequently, the implemented dynamic hardware system meets vital embedded system constraints of high performance and low cost, resource utilization, and power consumption, while achieving efficient classification with high accuracy.

Keywords

SVM Cascade classifier Melanoma FPGA DPR Embedded system 

Notes

Compliance with ethical standards

Conflict of interest

The authors declare that they have no conflict of interest.

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Copyright information

© The Natural Computing Applications Forum 2018

Authors and Affiliations

  1. 1.Department of Electrical and Electronic EngineeringAuckland University of TechnologyAucklandNew Zealand
  2. 2.Department of IT and Software EngineeringAuckland University of TechnologyAucklandNew Zealand

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