Abstract
A standard procedure for optimizing both hardware and software in any system is to analyze bottlenecks, reduce them, and make the best possible balance of systems. As the next generation of computing continues to evolve, a new bottleneck has centered on one main resource: energy. Any needlessly spent energy produces heat, increasing loads on cooling systems and raises the hardware temperature, which lowers overall circuit performance. These factors make it clear: like a penny saved, a joule saved is worth not just one joule but hundreds of joules not spent by a bigger power plug.
Simultaneously, all engineering parameters must be measured and weighed in order to keep a clear goal in mind: end users who have greatly invested in programming and development efforts wish to maintain high performance, reduce energy consumption, and do so without significant changes to the original source code. While smaller circuitry increases some energy efficiency, the software level must bridge the gap. The following paper considers a user-friendly solution providing a transparent runtime system.
The Runtime Energy Saving Technology (REST) utilizes Dynamic Voltage and Frequency Scaling (DVFS) to modify frequencies of an architecture’s underlying cores at runtime without prior knowledge. It includes a study on two different Xeon architectures’ energy usage and different frequency predictors. Finally, the paper examines results on HPC-type applications, which show energy consumption reductions by an average of 15.01 % on the SPEC CPU2006 and 10.45 % on the parallel NAS benchmark suites while only degrading performance by 5.95 % and 3.74 %, respectively, compared to the system’s default OnDemand governor.
Similar content being viewed by others
References
Annavaram M, Rakvic R, Polito M, Bouguet JY, Hankins RA, Davies B (2004) The fuzzy correlation between code and performance predictability. In: Proceedings of the 37th annual IEEE/ACM international symposium on microarchitecture, MICRO 37. IEEE Computer Society, Washington, pp 93–104
Beyler JC, Clauss P (2006) Esodyp: an entirely software and dynamic data prefetcher based on a Markov model. In: Proceedings of the 12th workshop on compilers for parallel computers, CPC 2006, University of A Coruna, pp 118–132
Caffarel M, Scemama A (2010) Final report: large-scale quantum Monte Carlo simulations for chemistry PRACE preparatory access call pa0356. In: Proceedings of the 5th international workshop on distributed cooperative laboratories: instrumenting the grid, 2010
Dhodapkar AS, Smith JE (2003) Comparing program phase detection techniques. In: Proceedings of the 36th annual IEEE/ACM international symposium on microarchitecture, MICRO 36. IEEE Computer Society, Washington, p 217
Freeh VW, Lowenthal DK (2005) Using multiple energy gears in MPI programs on a power-scalable cluster. In: Proceedings of the tenth ACM SIGPLAN symposium on principles and practice of parallel programming, PPoPP ’05. ACM, New York, pp 164–173
Hsu C-h, Feng W-c (2005) A power-aware run-time system for high-performance computing. In: Proceedings of the 2005 ACM/IEEE conference on supercomputing. SC’05. IEEE Computer Society, Washington, p 1
Isci C, Martonosi M (2003) Identifying program power phase behavior using power vectors. In: IEEE international workshop on workload characterization, 2003, WWC-6, pp 108–118
Isci C, Contreras G, Martonosi M (2006) Live, runtime phase monitoring and prediction on real systems with application to dynamic power management. In: Proceedings of the 39th annual IEEE/ACM international symposium on microarchitecture, MICRO 39. IEEE Computer Society, Washington, pp 359–370
Kim W, Gupta M, Wei GY, Brooks D (2008) System level analysis of fast, per-core DVFS using on-chip switching regulators. In: IEEE 14th international symposium on high performance computer architecture, 2008. HPCA 2008, pp 123–134
Li D, de Supinski BR, Schulz M, Cameron KW, Nikolopoulos DS (2010) Hybrid MPI/OpenMP power-aware computing. In: IPDPS, pp 1–12
Ma K, Li X, Chen M, Wang X (2011) Scalable power control for many-core architectures running multi-threaded applications. In: Proceedings of the 38th annual international symposium on computer architecture, ISCA ’11. ACM, New York, pp 449–460
Magklis G, Scott M, Semeraro G Albonesi D, Dropsho S (2003) Profile-based dynamic voltage and frequency scaling for a multiple clock domain microprocessor. In: Proceedings of 30th annual international symposium on computer architecture, 2003, pp 14–25
Miyoshi A, Lefurgy C, Van Hensbergen E, Rajamony R, Rajkumar R (2002) Critical power slope: understanding the runtime effects of frequency scaling. In: Proceedings of the 16th international conference on supercomputing, ICS ’02. ACM, New York, pp 35–44
Monari A, Scemama A, Caffarel M (2010) Large-scale quantum Monte Carlo electronic structure calculation on the EGEE grid. In: Proceedings of the 5th international workshop on distributed cooperative laboratories: instrumenting the grid (2010)
Pakbaznia E, Pedram M (2009) Minimizing data center cooling and server power costs. In: Proceedings of the 14th ACM/IEEE international symposium on low power electronics and design, ISLPED ’09. ACM, New York, pp 145–150
Rohou E (2011) Tiptop: hardware performance counters for the masses. Research report RR-7789, INRIA. http://hal.inria.fr/hal-00639173/en/
Rountree B, Lowenthal DK, Funk S, Freeh VW, de Supinski BR, Schulz M (2007) Bounding energy consumption in large-scale MPI programs. In: Proceedings of the 2007 ACM/IEEE conference on supercomputing, SC ’07. ACM, New York, pp 49:1–49:9
Sarood O, Kale LV (2011) A ‘cool’ load balancer for parallel applications. In: Proceedings of 2011 international conference for high performance computing, networking, storage and analysis, SC ’11. ACM, New York, pp 21:1–21:11
Sherwood T, Sair S, Calder B (2003) Phase tracking and prediction. In: Proceedings of the 30th annual international symposium on computer architecture, ISCA ’03. ACM, New York, pp 336–349
Xie F, Martonosi M, Malik S (2003) Compile-time dynamic voltage scaling settings: opportunities and limits. In: Proceedings of the ACM SIGPLAN 2003 conference on programming language design and implementation, PLDI ’03. ACM, New York, pp 49–62
Zeng H, Ellis CS, Lebeck AR, Vahdat A (2002) Ecosystem: managing energy as a first class operating system resource. Oper Syst Rev 36:123–132
Author information
Authors and Affiliations
Corresponding author
Rights and permissions
About this article
Cite this article
Livingston, K., Triquenaux, N., Fighiera, T. et al. Computer using too much power? Give it a REST (Runtime Energy Saving Technology). Comput Sci Res Dev 29, 123–130 (2014). https://doi.org/10.1007/s00450-012-0226-0
Published:
Issue Date:
DOI: https://doi.org/10.1007/s00450-012-0226-0