Improved performance of nanoscale junctionless tunnel field-effect transistor based on gate engineering approach

Abstract

In this paper, a first qualitative study on the performance characteristics of dual-work function gate junctionless TFET (DWG-JLTFET) on the basis of energy band profile modulation is investigated. A dual-work function gate technique is used in a JLTFET in order to create a downward band bending on the source side similar to PNPN structure. Compared with the single-work function gate junctionless TFET (SWG-JLTFET), the numerical simulation results demonstrated that the DWG-JLTFET simultaneously optimizes the ON-state current, the OFF-state leakage current, and the threshold voltage and also improves average subthreshold slope. It is illustrated that if appropriate work functions are selected for the gate materials on the source side and the drain side, the JLTFET exhibits a considerably improved performance. Furthermore, the optimization design of the tunnel gate length (L Tun) for the proposed DWG-JLTFET is studied. All the simulations are done in Silvaco TCAD for a channel length of 20 nm using the nonlocal band-to-band tunneling (BTBT) model.

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Correspondence to Seyed Ali Sedigh Ziabari.

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Molaei Imen Abadi, R., Sedigh Ziabari, S.A. Improved performance of nanoscale junctionless tunnel field-effect transistor based on gate engineering approach. Appl. Phys. A 122, 988 (2016). https://doi.org/10.1007/s00339-016-0530-9

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Keywords

  • Work Function
  • Subthreshold Slope
  • Source Side
  • Drain Side
  • Tunnel Gate