Influence of excess Si distribution in the gate oxide on the memory characteristics of MOSFETs

Abstract

In this work, Si ions are implanted into the gate oxide of MOSFETs with different implantation schemes, followed by a high-temperature annealing. The memory characteristics of the MOSFETs have been investigated for the following two excess Si distributions: (1) the excess Si is distributed in a narrow layer in the gate oxide near the Si substrate; and (2) the excess Si is distributed throughout the gate oxide. It is observed that both the excess Si distributions have good endurance of up to 106 program/erase cycles. The second excess Si distribution exhibits a better retention characteristic with less than 50% charge loss after 10 years. In contrast, the first excess Si distribution shows a complete charge loss after 1 year.

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Correspondence to J.I. Wong or T.P. Chen.

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PACS

73.22.-f; 73.63.Bd; 81.07.Bc

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Wong, J., Chen, T., Yang, M. et al. Influence of excess Si distribution in the gate oxide on the memory characteristics of MOSFETs. Appl. Phys. A 91, 411–413 (2008). https://doi.org/10.1007/s00339-008-4450-1

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Keywords

  • Gate Oxide
  • Storage Node
  • Memory Characteristic
  • Memory Window
  • Narrow Layer