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Complexity of Fixed-Size Bit-Vector Logics

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Abstract

Bit-precise reasoning is important for many practical applications of Satisfiability Modulo Theories (SMT). In recent years, efficient approaches for solving fixed-size bit-vector formulas have been developed. From the theoretical point of view, only few results on the complexity of fixed-size bit-vector logics have been published. Some of these results only hold if unary encoding on the bit-width of bit-vectors is used. In our previous work (Kovásznai et al. 2012), we have already shown that binary encoding adds more expressiveness to various fixed-size bit-vector logics with and without quantification. In a follow-up work (Fröhlich et al. 2013), we then gave additional complexity results for several fragments of the quantifier-free case. In this paper, we revisit our complexity results from (Fröhlich et al. 2013; Kovásznai et al. 2012) and go into more detail when specifying the underlying logics and presenting the proofs. We give a better insight in where the additional expressiveness of binary encoding comes from. In order to do this, we bring together our previous work and propose several new complexity results for new fragments and extensions of earlier bit-vector logics. We also discuss the expressiveness of various bit-vector operations in more detail. Altogether, we provide the currently most complete overview on the complexity of common bit-vector logics.

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Notes

  1. http://www.smtlib.org/

  2. This kind of result is often called unary NP-completeness [32].

  3. Recall that only a variable, a constant, or an uninterpreted function can have explicit bit-width.

  4. Although we do not intend the present a reduction of a general shift to the respective shift by constant, it is worth to mention that a common approach for such a reduction is the barrel shifter.

  5. http://ecee.colorado.edu/wpmu/iimc/

  6. http://fmv.jku.at/

  7. http://www.satcompetition.org/

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Authors and Affiliations

  1. Institute for Formal Models and Verification, Johannes Kepler University, Linz, Austria

    Gergely Kovásznai, Andreas Fröhlich & Armin Biere

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  1. Gergely Kovásznai
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  2. Andreas Fröhlich
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  3. Armin Biere
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Corresponding author

Correspondence to Andreas Fröhlich.

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This work is partially supported by FWF, NFN Grant S11408-N23 (RiSE)

Appendices

Appendix A: Example: A Reduction of a DQBF to QF_BV2≪c

Consider the following DQBF:

$$\begin{array}{ll} \forall u_{0},u_{1},u_{2} \exists x(u_{0}),y(u_{1},u_{2}) \ . \ & (x \lor y \lor \neg u_{0} \lor \neg u_{1}) \ \land \\ & (x \lor \neg y \lor u_{0} \lor \neg u_{1} \lor \neg u_{2}) \ \land \\ & (x \lor \neg y \lor \neg u_{0} \lor \neg u_{1} \lor u_{2}) \ \land \\ & (\neg x \lor y \lor \neg u_{0} \lor \neg u_{2}) \ \land \\ & (\neg x \lor \neg y \lor u_{0} \lor u_{1} \lor \neg u_{2}) \end{array} $$

This DQBF is unsatisfiable.

Using the reduction given in Lemma 1, this formula is translated to the following QF_BV2≪c formula:

$$ \begin{array}{l} \left( (X \mid Y \mid \sim\! U_{0} \mid \sim\! U_{1}) \ \& \ (X \mid \sim\! Y \mid U_{0} \mid \sim\! U_{1} \mid \sim\! U_{2}) \ \& \ (X \mid \sim\! Y \mid \sim\! U_{0} \mid \sim\! U_{1} \mid U_{2}) \ \& \ \right.\\ \left.(\sim\! X \mid Y \mid \sim\! U_{0} \mid \sim\! U_{2}) \ \& \ (\sim\! X \mid \sim\! Y \mid U_{0} \mid U_{1} \mid \sim\! U_{2}) \right) \ = \ \sim\!0^{[8]} \ \ \land \\ \bigwedge_{m\in\{0,1,2\}} U_{m} \ll 2^{m} \ = \ \sim\!U_{m} \ \ \land \\ X \ \& \ \sim\!U_{1} \ = \ (X \ll 2^{1}) \ \& \ \sim\!U_{1} \ \ \land \\ X \ \& \ \sim\!U_{2} \ = \ (X \ll 2^{2}) \ \& \ \sim\!U_{2} \ \ \land \\ Y \ \& \ \sim\!U_{0} \ = \ (Y \ll 2^{0}) \ \& \ \sim\!U_{0} \end{array} $$
(6)

In the following, let us show that this formula is also unsatisfiable.

Recall that the notation t [n] d is an alternative for [[[n]]]=d, assuming an appropriate model for t. By construction, U 0 01010101, U 1 00110011, and U 2 00001111.

First, we show how the bits of X get restricted by the constraints introduced above. Let us denote the originally unrestricted bits of X with x 7,x 6,…,x 0. Since the bit-vectors

figure r

are forced to be equal, some bits of X should coincide, as follows:

figure s

Furthermore, considering also the equality

figure t

results in

figure u

In a similar fashion, the bits of Y are constrained as follows:

figure v

In order to show that the formula (6) is unsatisfiable, let us evaluate the “clauses” in the formula:

figure w

By applying bitwise and to them, we get the bit-vector constrained by the formula (6):

figure x

In order to check if t=∼ 0[8] is satisfiable, it is sufficient to try to satisfy the set of the above Boolean clauses. It is easy to see that this clause set is unsatisfiable, since, by unit propagation, x 1 and y 2 must be assigned to 1, which contradicts with the clause ¬x 1∨¬y 2.

Appendix B: Example: A Reduction of a QBF to QF_BV2≪1

Consider the following QBF:

$$\begin{array}{ll} \exists x \forall u_{2} \exists y \forall u_{1} u_{0} \exists z \ . \ & (u_{2} \lor u_{1} \lor \neg z) \ \land \\ & (u_{2} \lor \neg x \lor y) \ \land \\ & (u_{0} \lor \neg x \lor \neg z) \ \land \\ & (u_{1} \lor \neg y \lor z) \ \land \\ & (u_{0} \lor \neg u_{1} \lor z) \end{array} $$

This QBF is satisfiable.

Using the reduction given in Lemma 2, this formula is translated to the following QF_BV2≪1 formula:

$$ \begin{array}{l} \left( (U_{2} \mid U_{1} \mid \sim\! Z) \ \& \ (U_{2} \mid \sim\! X \mid Y) \ \& \ (U_{0} \mid \sim\! X \mid \sim\! Z) \ \& \ \right.\\ \left.(U_{1} \mid \sim\! Y \mid Z) \ \& \ (U_{0} \mid \sim\! U_{1} \mid Z) \right) \ = \ \sim\!0^{[8]} \ \ \land \\ \bigwedge_{m\in\{0,1,2\}} \left( \bigwedge_{0 \leq i < m} U_{i}\right) \oplus U_{m} \ = \ U_{m} \ll 1 \ \ \land \\ X \ \& \ \sim\! 1 \ = \ X \ll 1 \ \ \land \\ \left( U^{\prime}_{2} \ = \ \sim\! \left( (U_{2} \ll 1) \oplus U_{2} \right)\right) \ \ \land \ \ \left( Y \ \& \ U^{\prime}_{2} \ = \ (Y \ll 1) \ \& \ U^{\prime}_{2} \right) \end{array} $$
(7)

In the following, let us show that this formula is also satisfiable. As in the previous example, we have U 0 01010101, U 1 00110011, and U 2 00001111. However, this time the binary magic numbers were created in a different way to ensure that only addition and bitwise operations are used.

First, we show how the bits of X get restricted by the constraints introduced above. Let us denote the originally unrestricted bits of X with x 7,x 6,…,x 0. Since the bit-vectors

figure ab

must be equal, all bits of X are forced to be equal:

figure ac

Similarly, we get some constraints on Y. By using the mask

figure ad

the following bit-vectors

figure ae

are forced to be equal, putting restrictions on the individual bits of Y:

figure af

Finally, Z is not restricted in any way since u 0 is the innermost universal variable that z depends on, i.e., z depends on all universal variables.

figure ag

In order to show that the formula (7) is satisfiable, let us evaluate the “clauses” in the formula:

figure ah

By applying bitwise and to them, we get the bit-vector constrained by the formula (7):

figure ai

t=∼ 0[8] can easily be satisfied, e.g., by setting

$$\begin{array}{l} z_{7} = z_{6} = y_{4} = y_{0} = x_{0} = 0 \\ z_{5} = z_{1} = 1 \end{array} $$

Therefore,

figure aj

is a possible satisfying assignment for the bit-vector formula.

Appendix C: Example: Bit-Width Reduction of a QF_BV2 b w Formula with Indexing and Relational Operations

Let

$${\Phi}_{0} \ := \ \left( x^{[100]} \ <_{\mathbf{u}}\ y^{[100]}\right) \land \left( z^{[50]} = w^{[50]}\right) \land \left( w^{[100]}\![38] = y^{[100]}\![72]\right) $$

be a bit-vector formula with maximal bit-width 100. Note that we now use decimal encoding on the scalars. The set of explicit indices in the formula is given by I:={38,72}. We now generate Φ1 by splitting all bit-vectors at the corresponding bit-indices. First, x [100] < u y [100] is therefore replaced by

$$\begin{array}{lcr} & & \left( x^{\prime}_{99:73}{\!}^{[27]} \ <_{\mathbf{u}}\ y^{\prime}_{99:73}{\!}^{[27]}\right)\\ & \lor & \left( x^{\prime}_{99:73}{\!}^{[27]} = y^{\prime}_{99:73}{\!}^{[27]}\right) \land \left( \lnot x^{\prime}_{72}{\!}^{[1]} \land y^{\prime}_{72}{\!}^{[1]}\right)\\ & \lor & \left( x^{\prime}_{99:73}{\!}^{[27]} = y^{\prime}_{99:73}{\!}^{[27]}\right) \land \left( x^{\prime}_{72}{\!}^{[1]} \Leftrightarrow y^{\prime}_{72}{\!}^{[1]}\right) \land \left( x^{\prime}_{71:39}{\!}^{[33]} \ <_{\mathbf{u}}\ y^{\prime}_{71:39}{\!}^{[33]}\right)\\ & \lor & \left( x^{\prime}_{99:73}{\!}^{[27]} = y^{\prime}_{99:73}{\!}^{[27]}\right) \land \left( x^{\prime}_{72}{\!}^{[1]} \Leftrightarrow y^{\prime}_{72}{\!}^{[1]}\right) \\ & & \land \ \left( x^{\prime}_{71:39}{\!}^{[33]} = y^{\prime}_{71:39}{\!}^{[33]}\right) \land \left( \lnot x^{\prime}_{38}{\!}^{[1]} \land y^{\prime}_{38}{\!}^{[1]}\right)\\ & \lor & \left( x^{\prime}_{99:73}{\!}^{[27]} = y^{\prime}_{99:73}{\!}^{[27]}\right) \land \left( x^{\prime}_{72}{\!}^{[1]} \Leftrightarrow y^{\prime}_{72}{\!}^{[1]}\right) \\ & & \land \ \left( x^{\prime}_{71:39}{\!}^{[33]} = y^{\prime}_{71:39}{\!}^{[33]}\right) \land \left( x^{\prime}_{38}{\!}^{[1]} \Leftrightarrow y^{\prime}_{38}{\!}^{[1]}\right) \land \left( x^{\prime}_{37:0}{\!}^{[38]} \ <_{\mathbf{u}}\ y^{\prime}_{37:0}{\!}^{[38]}\right) \end{array} $$

Next, z [50]=w [50] is replaced by

$$\left( z^{\prime}_{49:39}{\!}^{[11]} = w^{\prime}_{49:39}{\!}^{[11]}\right) \land \left( z^{\prime}_{38}{\!}^{[1]} \Leftrightarrow w^{\prime}_{38}{\!}^{[1]}\right) \land \left( z^{\prime}_{37:0}{\!}^{[38]} = w^{\prime}_{37:0}{\!}^{[38]}\right) $$

Finally, w [100] [38]=y [100] [72] is replaced by

$$w^{\prime}_{38}{\!}^{[1]} \Leftrightarrow y^{\prime}_{72}{\!}^{[1]} $$

Since we only have 11 relational operations in Φ1, we can generate a bit-width reduced formula Φ2 by replacing all bit-widths n in Φ1 with min{11,n}. We therefore replace the variables

$$\begin{array}{@{}rcl@{}} x^{\prime}_{99:73}{\!}^{[27]}, y^{\prime}_{99:73}{\!}^{[27]}, x^{\prime}_{71:39}{\!}^{[33]}, y^{\prime}_{71:39}{\!}^{[33]},\\ x^{\prime}_{37:0}{\!}^{[38]}, y^{\prime}_{37:0}{\!}^{[38]}, z^{\prime}_{37:0}{\!}^{[38]}, w^{\prime}_{37:0}{\!}^{[38]}, \end{array} $$

by

$$\begin{array}{@{}rcl@{}} x^{\prime\prime}_{99:73}{\!}^{[11]}, y^{\prime\prime}_{99:73}{\!}^{[11]}, x^{\prime\prime}_{71:39}{\!}^{[11]}, y^{\prime\prime}_{71:39}{\!}^{[11]},\\ x^{\prime\prime}_{37:0}{\!}^{[11]}, y^{\prime\prime}_{37:0}{\!}^{[11]}, z^{\prime\prime}_{37:0}{\!}^{[11]}, w^{\prime\prime}_{37:0}{\!}^{[11]} \end{array} $$

respectively.

Appendix D: Example: Half-Shuffle and Expand Applied to a Bit-Vector

\(\mathit {halfshuffle}(\overbrace {1101}^{t^{[4]}},\ 16)\) can be replaced with x 2 [16], by adding the following assertions. First, zero extension is applied to the original vector:

figure ak

Now, in two iterations, the bits of t [4] are separated and moved to the distinct partitions of the extended vector:

figure al

The result now can be used for example in expand: \(\mathit {expand}(\overbrace {1101}^{t^{[4]}},\ 16)\) can be expressed as \(x^{\prime }_{2}{\!}^{[16]}\), by adding the following assertions:

figure am

Appendix E: Example: Multiplication of Two Bit-Vectors

The multiplication \(\overbrace {0011}^{t_{1}{\!}^{[4]}} \cdot \overbrace {0101}^{t_{2}{\!}^{[4]}}\) can be expressed as x 2 [16][3:0], by adding the following assertions. First, both bit-vectors are transformed by selfconcat and expand to quadratic size in order to generate all single-digit multiplications in one step by using bitwise and:

figure an

g 3 [4],g 2 [4],g 1 [4], and g 0 [4] are the bit groups representing the bit-vector which is the result of single-digit multiplication of t 1 [4]=0011 with the single bits of t 2 [4]=0101. Now, the neighbouring groups have to be shifted to their relative offsets and are added:

figure ao

g 32 [8] and g 10 [8] are the bit groups representing the bit-vectors which would be obtained by adding the bit-vectors represented by g 3 [4], g 2 [4] and g 1 [4], g 0 [4], respectively. This involves respecting their relative offsets, i.e., g 32=(g 3≪1)+g 2 and g 10=(g 1≪1)+g 0.

Since we still have several partial results, we have to continue adding neighbouring groups:

figure ap

After the last step, there is only one bit group left and the least significant bits of the bit-vector x 2 [16] 0000 0000 0000 1111 correspond to the solution of the multiplication, i.e., 0011⋅0101=x 2 [16][3:0]1111.

Further examples for multiplication or for other operations can easily be generated by feeding our benchmark family of bit-vector operations encoded in the SMT-LIB format into an SMT solver.

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Kovásznai, G., Fröhlich, A. & Biere, A. Complexity of Fixed-Size Bit-Vector Logics. Theory Comput Syst 59, 323–376 (2016). https://doi.org/10.1007/s00224-015-9653-1

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