Abstract
The increasing penetration of electric vehicles (EVs) in all segments of the transport sector increases the charging requirements for various kinds and ratings of EVs. A low-cost, high-efficiency interleaved converter can play a vital role for low-power charging requirements. This paper presents the characterization of an n-phase interleaved buck converter (nPIBC). A state space analysis of a three-phase interleaved buck converter (TPIBC) with circuit parasitic is presented, which is further generalized for an nPIBC with circuit parasitic. The state space averaging (SSA) technique has been used to develop a small signal model for the TPIBC. The analytical solution for TPIBC is presented, along with the comparison with respect to single-phase and two-phase interleaved buck converter (IBC) and consideration of circuit parasitic variables and their effects on TPIBC for variable output power up to 600W for a fixed input voltage of 200 V and different output voltages of 48 V, 8 A to 60 V, 10 A at different duty cycles. A TPIBC prototype is developed in the laboratory and the analytical results are verified with respect to per unit values in real time.
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This research supported by the Science and Engineering Research Board (SERB), Department of Science & Technology, Government of India, under the SERB sanction order number SRG/2021/001640.
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Kumar, N., Kumar, M. Modeling and characterization of n-phase interleaved buck converter with circuit parasitic for battery charging applications. Electr Eng (2024). https://doi.org/10.1007/s00202-024-02347-2
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DOI: https://doi.org/10.1007/s00202-024-02347-2