Abstract
The instruction set architecture (ISA) of a computing machine is the definition of the binary instructions, registers, and memory space visible to an executable binary image. ISAs are typically implemented in hardware as microprocessors, but also in software running on a host processor, i.e. virtual machines (VMs). Despite there being many ISAs in existence, all share a set of core properties which have been tailored to their particular applications. An abstract model may capture these generic properties and be subsequently refined to a particular machine, providing a reusable template for development of robust ISAs by the formal construction of all normal and exception conditions for each instruction. This is a task to which the Event-B (Metayer et al. in Rodin deliverable 3.2 Event-B language, http://rodin.cs.ncl.ac.uk, 2005; Schneider in The B-method an introduction, Palgrave, Basingstoke, 2001) formal notation is well suited. This paper describes a project to use the Rodin tool-set (Abrial in Formal methods and software engineering, Springer, Berlin, 2006) to perform such a process, ultimately producing two variants of the MIDAS (Microprocessor Instruction and Data Abstraction System) ISA (Wright in Abstract state machines, B and Z, Springer, Berlin, 2007; Wright in MIDAS machine specification, Bristol University, http://www.cs.bris.ac.uk/Publications, 2009) as VMs. The abstract model is incrementally refined to variant models capable of automatic translation to C source code, which this is compiled to create useable VMs. These are capable of running binary executables compiled from high-level languages such as C (Kernighan and Ritchie in The C programming language, Prentice-Hall, Englewood Cliffs, 1988), and compilers targeted to each variant allow demonstration programs to be executed on them.
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References
Abrial J-R (1996) The B-Book: assigning programs to meanings
Abrial J-R, Butler M, Hallerstede S, Voisin L (2006) An open extensible tool environment for Event-B. In: Formal methods and software engineering. Springer, Berlin
AMD Inc (2007) 128-Bit SSE5 instruction set
B-Core (2006) The B-toolkit user manual. B-Core (UK) Ltd
Beer I, Ben-David S (1997) RuleBase: model checking at IBM. CAV
Brock B, Hunt W (1991) Report on the formal specification and partial verification of the VIPER microprocessor. In: Proceedings of the sixth annual conference on computer assurance, systems integrity, software safety and process security
Butler M (2006) Rodin deliverable D16 prototype plug-in tools. http://rodin.cs.ncl.ac.uk
Caset L (2002) Formal development of an embedded verifier for Java card byte code. In: International conference on dependable systems and networks
Eclipse (2009) Eclipse platform homepage. http://www.eclipse.org/
Evans N, Butler M (2006) A proposal for records in Event-B. In: Formal methods 2006
Evans N, Grant N (2007) Towards the formal verification of a Java processor in Event-B. In: Proceedings of the BAC-FACS refinement workshop
Fox A (2003) Formal specification and verification of ARM6. In: Theorem proving in higher order logics. Springer, Berlin
Graham B, Birtwistle G (1990) Formalising the design of an SECD chip. In: Hardware specification, verification and synthesis: mathematical aspects. Springer, Berlin
Hennessy J, Patterson D (2003) Computer architecture, a quantitive approach. Morgan Kaufmann, Menlo Park
Hitachi Ltd (1998) SH7707 hardware manual
Hunt W (1994) FM8501: A verified microprocessor. In: Lecture notes in artificial intelligence subseries of lecture notes in computer science. Springer, Berlin
Kernighan B, Ritchie D (1988) The C programming language. Prentice-Hall, Englewood Cliffs
Klein G, Nipkow T (2001) Verified bytecode verifiers. In: Foundations of software science and computation structures. Springer, Berlin
Lapsley P, Bier J, Shoham A, Lee E (1997) DSP processor fundamentals. IEEE Press, New York
Lee E (1989) Programmable DSP processors part I and II. IEEE ASSP Mag Oct 1988, Jan 1989
Leuschel M, Butler M (2003) ProB: a model checker for B. FME 2003. Springer, Berlin
Lindholm T, Yellin F (1999) The Java virtual machine specification, 2nd edn.
Metayer C, Abrial J-R, Voisin L (2005) Rodin deliverable 3.2 Event-B language. http://rodin.cs.ncl.ac.uk
Patterson D (2007) Computer organization and design: the hardware/software interface. Morgan Kaufmann, Menlo Park
Qian Z (1999) A formal specification of Java virtual machine instructions for objects, methods and subroutines. In: Formal syntax and semantics of Java. Springer, Berlin
Shavor S, D’Anjou J, Fairbrother S (2003) The Java developer’s guide to eclipse. Addison-Wesley, Reading
Sherridan F (2007) Practical testing of a C99 compiler using output comparison. Softw Pract Experience 37(14): 1475–1488
Spivey JM (1989) The Z notation: a reference manual. Prentice-Hall, Englewood Cliffs
Srivas M, Miller S (1995) Formal verification of an avionics microprocessor. Langley Research Center, Hampton
Stallman R (2001) Using and porting the GNU compiler collection. In: Free Software Foundation
Stark R, Schmid J, Borger E (2001) Java and the Java virtual machine. Springer, Berlin
Utting M, Legeard B (2007) Practical model-based testing—a tools approach. Morgan Kaufmann, Menlo Park
Wright S (2009) MIDAS machine specification. Bristol University. http://www.cs.bris.ac.uk/Publications
Wright S (2009) Automatic generation of C from Event-B. In: Workshop on integration of model-based formal methods and tools
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Michael Poppleton and Michael Butler
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Wright, S., Eder, K. Using Event-B to construct instruction set architectures. Form Asp Comp 23, 73–89 (2011). https://doi.org/10.1007/s00165-009-0142-7
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DOI: https://doi.org/10.1007/s00165-009-0142-7