Skip to main content
Log in

Interface synthesis and protocol conversion

  • Original Article
  • Published:
Formal Aspects of Computing

Abstract

Given deterministic interfaces P and Q, we investigate the problem of synthesising an interface R such that P composed with R refines Q. We show that a solution exists iff P and \(Q^\bot\) are compatible, and the most general solution is given by \((P \parallel Q^\bot)^\bot\) , where \(P^\bot\) is the interface P with inputs and outputs interchanged. Remarkably, the result holds both for asynchronous and synchronous interfaces. We model interfaces using the interface automata formalism of de Alfaro and Henzinger. For the synchronous case, we give a new definition of synchronous interface automata based on Mealy machines and show that the result holds for a weak form of nondeterminism, called observable nondeterminism. We also characterise solutions to the synthesis problem in terms of winning input strategies in the automaton \((P \otimes Q^\bot)^\bot\) , and the most general solution in terms of the most permissive winning strategy. We apply the solution to the synthesis of converters for mismatched protocols in both the asynchronous and synchronous domains. For the asynchronous case, this leads to automatic synthesis of converters for incompatible network protocols. In the synchronous case, we obtain automatic converters for mismatched intellectual property blocks in system-on-chip designs. The work reported here is based on earlier work on interface synthesis in Bhaduri (Third international symposium on automated technology for verification and analysis, ATVA 2005, pp 338–353, 2005) for the asynchronous case, and Bhaduri and Ramesh (Sixth international conference on application of concurrency to system design, ACSD 2006, pp 208–216) for the synchronous one.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Similar content being viewed by others

References

  1. Abramsky S (1997) Semantics of interaction: an introduction to game semantics. In: Proceedings of the 1996 CLiCS Summer School. Cambridge University Press, Cambridge, pp 1–31

  2. Alur R, Henzinger TA, Kupferman O, Vardi MY (1998) Alternating refinement relations. In: CONCUR 98: Concurrency theory. Lecture notes in computer science, Vol 1466. Springer, Heidelberg, pp 163–178

  3. Berry G, Benveniste A (1991) The synchronous approach to reactive and real-time systems. Procedings of the IEEE 79(9)

  4. Burch JR, Dill D, Wolf E, De Micheli G (1993) Modeling hierarchical combinational circuits. In: Lightner M (ed) Proceedings of the IEEE/ACM international conference on computer-aided design. IEEE Computer Society Press, Los Alamitos, pp 612–617

  5. Bhaduri P (2005) Synthesis of interface automata. In: Third international symposium on automated technology for verification and analysis (ATVA 2005). Lecture notes in computer science, Vol 3707. Springer, Heidelberg, pp 338–353

  6. Büchi JR, Landweber LH (1969) Solving sequential conditions by finite-state strategies. Trans Am Math Soc 138:295–311

    Article  Google Scholar 

  7. Blass A (1992) A game semantics for linear logic. Ann Pure Appl Logic 56:183–220 (special Volume dedicated to the memory of John Myhill)

    Google Scholar 

  8. Burch JR, Passerone R, Sangiovanni-Vincentelli AL (2003) Notes on agent algebras. Technical report UCB/ERL M03/38, EECS Department, University of California, Berkeley

  9. Bhaduri P, Ramesh S (2006) Synthesis of synchronous interfaces. In: Sixth international conference on application of concurrency to system design, ACSD 2006, IEEE Computer Society, Los Alamitos, pp 208–216

  10. Chakrabarti A, de Alfaro L, Henzinger TA, Mang FYC (2002) Synchronous and bidirectional component interfaces. In: CAV 02: computer-aided verification, lecture notes in computer science, Vol 2404. Springer, Heidelberg, pp 208–216.

  11. Calvert KL, Lam SS (1990) Formal methods for protocol conversion. IEEE J Sel Areas Commun 8(1):127–142

    Article  Google Scholar 

  12. de Alfaro L (2003) Game models for open systems. In: Proceedings of the international symposium on verification (theory in practice). Lecture notes in computer science, Vol 2772. Springer, Heidelberg

  13. de Alfaro L, Henzinger TA (2001) Interface automata. In: Foundations of software engineering, ACM Press, New York, pp 109–120

  14. de Alfaro L, Henzinger TA, Mang FYC (2000) The control of synchronous systems. In: CONCUR 00: Concurrency theory, lecture notes in computer science, Vol 1877, Springer, Heidelberg, pp 458–473

  15. Dill DL (1989) Trace theory for automatic hierarchical verification of speed-independent circuits. ACM Distinguished dissertations. MIT Press, New York

  16. D’Silva V, Ramesh S, Sowmya A (2004) Bridge over troubled wrappers: automated interface synthesis. In: VLSI Design, IEEE Computer Society, Los Alamitos, pp 189–194

  17. D’Silva V, Ramesh S, Sowmya A (2004) Synchronous protocol automata: a framework for modelling and verification of SoC communication architectures. In: 2004 design, automation and test in Europe conference and exposition (DATE 2004), pp 390–395

  18. Girard J-Y (1987) Linear logic. Theor Comput Sci 50:1–102

    Article  MATH  MathSciNet  Google Scholar 

  19. Haghverdi E, Ural H (1999) Submodule construction from concurrent system specifications. Inform Softwar Technol 41(8):499–506

    Article  Google Scholar 

  20. Kumar R, Nelvagal S, Marcus SI (1997) A discrete event systems approach for protocol conversion. Discr Event Dyn Syst 7(3):295–315

    Article  MATH  Google Scholar 

  21. Lam SS (1988) Protocol conversion. IEEE Trans Softwar Eng 14(3):353–362

    Article  Google Scholar 

  22. Lynch NA, Tuttle MR (1987) Hierarchical correctness proofs for distributed algorithms. In: Proceedings of the sixth annual ACM symposium on principles of distributed computing, 10–12 August 1987, pp 137–151

  23. Larsen KG, Xinxin L (1990) Equation solving using modal transition systems. In: Proceedings, fifth annual IEEE symposium on logic in computer science. IEEE Computer Society Press, Los Alamitos, pp 108–117

  24. Milner R (1989) Communication and Concurrency. Prentice Hall, New Jersy

    MATH  Google Scholar 

  25. Maler O, Pnueli A, Sifakis J (1995) On the synthesis of discrete controllers for timed systems. In: Theoretical aspects of computer science, Vol 900 of LNCS. Springer, Heidelberg, pp 229–242

  26. Madhusudan P, Thiagarajan PS (1998) Controllers for discrete event systems via morphisms. In: CONCUR ’98: concurrency theory, 9th international conference, lecture notes in computer science, Vol 1466. Springer, Heidlberg, pp 18–33

  27. Merlin P, von Bochmann G (1983) On the construction of submodule specifications and communication protocols. j-toplas 5(1):1–25

    Article  MATH  Google Scholar 

  28. Parrow J (1989) Submodule construction as equation solving in CCS. Theor Comput Sci 68:175–202

    Article  MATH  MathSciNet  Google Scholar 

  29. Passerone R (2004) Semantic foundations for heterogeneous systems. Ph.D thesis, EECS Department, University of California, Berkeley

  30. Passerone R, de Alfaro L, Henzinger TA, Sangiovanni-Vincentelli A (2002) Convertibility verification and converter synthesis: two faces of the same coin. In: Proceedings of the international conference on computer-aided design, IEEE Comput Soc Press, pp 132–139

  31. Pnueli A, Rosner R (1989) On the synthesis of a reactive module. In: POPL ’89. Proceedings of the sixteenth annual ACM symposium on principles of programming languages, 11–13 January 1989, Austin, TX, ACM Press, New York, pp 179–190

  32. Ramadge PJG, Wonham WM (1989) The control of discrete event systems. Proceedings of the IEEE. Dyn Discr Event Syst 77:1:81–98 (Special issue)

  33. Shields MW (1989) Implicit system specification and the interface equation. Comput J 32(5):399–412

    Article  MathSciNet  Google Scholar 

  34. Tabuada P (2004) Open maps, alternating simulations and control synthesis. In: CONCUR ’04, number 3170 in lecture notes in computer science, Springer, Heidelberg, pp 466–480

  35. Thomas W (1995) On the synthesis of strategies in infinite games. In: 12th Annual symposium on theoretical aspects of computer science. Lecture Notes in Computer Science, Vol 900. Springer, Heidelberg, pp 1–13

  36. von Bochmann G (2002) Submodule construction for specifications with input assumptions and output guarantees. In: Peled D, Vardi MY (eds) Formal techniques for networked and distributed systems—FORTE 2002. Lecture Notes in Computer Science, Vol 2529. Springer, Heidelberg, pp 17–33

  37. Yevtushenko N, Villa T, Brayton RK, Petrenko A, Sangiovanni-Vincentelli A (2001) Solution of parallel language equations for logic synthesis. In: Proceedings of the 2001 international conference on computer-aided design (ICCAD-01). IEEE Computer Society, Los Alamitos, pp 103–111

  38. Yevtushenko N, Villa T, Brayton RK, Petrenko A, Sangiovanni-Vincentelli A (2002) Solution of synchronous language equations for logic synthesis. In: Proceedings of the 4th conference on computer-aided technologies in applied mathematics, pp 132–137

Download references

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Purandar Bhaduri.

Rights and permissions

Reprints and permissions

About this article

Cite this article

Bhaduri, P., Ramesh, S. Interface synthesis and protocol conversion. Form Asp Comp 20, 205–224 (2008). https://doi.org/10.1007/s00165-007-0045-4

Download citation

  • Received:

  • Revised:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s00165-007-0045-4

Keywords

Navigation