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FPGA-based module for SURF extraction

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Abstract

We present a complete hardware and software solution of an FPGA-based computer vision embedded module capable of carrying out SURF image features extraction algorithm. Aside from image analysis, the module embeds a Linux distribution that allows to run programs specifically tailored for particular applications. The module is based on a Virtex-5 FXT FPGA which features powerful configurable logic and an embedded PowerPC processor. We describe the module hardware as well as the custom FPGA image processing cores that implement the algorithm’s most computationally expensive process, the interest point detection. The module’s overall performance is evaluated and compared to CPU and GPU-based solutions. Results show that the embedded module achieves comparable distinctiveness to the SURF software implementation running in a standard CPU while being faster and consuming significantly less power and space. Thus, it allows to use the SURF algorithm in applications with power and spatial constraints, such as autonomous navigation of small mobile robots.

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Notes

  1. Considering around 140 descriptors per image.

  2. For profiling, we used a NT330-i with Intel Atom 330 1.6 GHz, 1 GB RAM and nVidia ION graphics card

  3. Actually it may have more sinks—the SPB is multi-slave.

  4. Currently, the image width is limited to 1,024 pixels. The BRAM usage is essentially given by the maximal box filter dimension, since all the needed image lines must be in the buffer for this calculation. Hence, if the design would be ported to a bigger FPGA with say twice the BRAM resources, the image width could be also roughly doubled.

  5. their number is set by an PDMAB IP core parameter

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Authors and Affiliations

  1. Lincoln Centre for Autonomous Systems, School of Computer Science, University of Lincoln, Lincoln, UK

    Tomáš Krajník

  2. Department of Cybernetics, Faculty of Electrical Engineering, Czech Technical University in Prague, Prague, Czech Republic

    Tomáš Krajník, Jan Šváb, Petr Čížek & Libor Přeučil

  3. División de Robótica CAREM, Centro Atómico Bariloche, Comisión Nacional de Energía Atómica, Buenos Aires, Argentina

    Sol Pedre

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  1. Tomáš Krajník
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  2. Jan Šváb
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  4. Petr Čížek
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  5. Libor Přeučil
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Correspondence to Tomáš Krajník.

Additional information

The EU supported this work by FP7 programme projects ICT-600623 ‘STRANDS’ and ICT-216240 ‘REPLICATOR’. The Czech Ministry of Education funded the work by projects 7AMB12AR022 and 7E08006 and Argentinean Ministry of Science supported this work by project ARC/11/11.

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Krajník, T., Šváb, J., Pedre, S. et al. FPGA-based module for SURF extraction. Machine Vision and Applications 25, 787–800 (2014). https://doi.org/10.1007/s00138-014-0599-0

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