Abstract
Ternary circuits are promising due to their lower interconnect complexity, storage requirement, and lesser pin count than binary circuits. The adder is one of the most important building blocks of a digital processor. This paper proposes carbon nanotube field effect transistor (CNTFET)-based ‘exact’ and ‘approximate’ ternary full adders (TFA). The CNTFET is attractive for realizing multi-valued logic (MVL)/ternary circuits because its threshold voltage can be changed by altering the diameter of its carbon nanotube (CNT). The exact ternary adders are realized using unary functions and multiplexers. The circuit size of only the ‘Sum’ block of a TFA is pruned in approximate ternary full adders by varying degrees for achieving superior performance in terms of transistor count, delay, and power consumption compared to the ‘exact’ TFAs. This performance gain in approximate TFAs is obtained at the cost of accuracy in some of the ‘Sum’ outputs. Circuits are simulated with HSPICE using a 32 nm CNTFET technology node at various supply voltages and temperatures. The proposed exact adders exhibit lower power consumption and transistor count, higher robustness, and lower power delay product (PDP) and energy delay product (EDP) than existing ternary adders. The improvement in PDP of the proposed exact TFAs varies from 20 to 96% compared to existing TFAs. The performance of the exact TFAs is then further improved by approximating its ‘Sum’ block in approximate TFAs. Image blending is used to demonstrate the effectiveness of approximate ternary adders in error-tolerant applications.
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Data Availability
SPICE-compatible CNTFET models are used for analyses from Stanford University Website: http://nano.stanford.edu/model.php?id=23
References
E. Abbasian, A. Aminzadeh, S.T. Anvari, GNRFET- and CNTFET-based designs of highly efficient 22 T unbalanced single-trit ternary multiplier cell. Arab. J. Sci. Eng. (2023). https://doi.org/10.1007/s13369-023-08053-8
E. Abbasian, M. Orouji, S.T. Anvari, An efficient GNRFET-based circuit design of ternary half-adder. AEUE – Int. J. Electr. Commun. 170, 154808 (2023). https://doi.org/10.1016/j.aeue.2023.154808
S.S. Ahmadpour, M. Mosleh, New designs of fault-tolerant adders in quantum-dot cellular automata. Nano Commun. Netw. 19, 10–25 (2019). https://doi.org/10.1016/j.nancom.2018.11.001
N.H. Bastani, M.H. Moaiyeri, K. Navi, An energy and area-efficient approximate ternary adder based on CNTFET switching logic. Circuits, Syst. Signal Process. 37, 1863–1883 (2018). https://doi.org/10.1007/s00034-017-0627-1
D. Das, A. Banerjee, V. Prasad. 2018: Design of ternary logic circuits using CNTFET, International Symposium on Devices, Circuits and Systems (ISDCS), (2018). https://doi.org/10.1109/ISDCS.2018.8379661.
J. Deng, H.S.P. Wong, A compact SPICE model for carbon-nanotube field-effect transistors including non-idealities and its application-part I: model of the intrinsic channel region. IEEE Trans. Electr. Dev. 54, 3186–3194 (2007). https://doi.org/10.1109/TED.2007.909030
J. Deng, H.S.P. Wong, A compact SPICE model for carbon-nanotube field-effect transistors including non-idealities and its application-part II: full device model and circuit performance benchmarking. IEEE Trans. Electr. Dev. 54, 3195–3205 (2007). https://doi.org/10.1109/TED.2007.909043
S. Firouzi, S. Tabrizchi, F. Sharifi, A.-H. Badawy, High performance, variation-tolerant CNTFET ternary full adder a process, voltage, and temperature variation-resilient design. Comput. Electr. Eng. 77, 205–216 (2019). https://doi.org/10.1016/j.compeleceng.2019.05.018
J. Guo, S. Koswatta, N. Neonphytou, M. Lundstrom, Carbon nanotube field-effect transistors. Int. J. High-Speed Electr. Syst. 16(4), 897–912 (2006). https://doi.org/10.1049/joe.2015.0119
S.A. Hosseini, S. Etezadi, A novel low-complexity and energy-efficient ternary full adder in nanoelectronics. Circuits Sys. Sig. Proc. 40, 1314–1332 (2021). https://doi.org/10.1007/s00034-020-01519-2
R.A. Jaber, M.A. Jihad, B. Owaidat, S. Al-Maadeed, Ultra-low energy CNTFET-based ternary combinational circuits designs. IEEE Access (2021). https://doi.org/10.1109/ACCESS.2021.3105577
R.A. Jaber, A.M. Haidar, F. Kassem, F. Zahoor, Ternary full adder designs employing unary operators and ternary multiplexers. Micromachines 14, 1064 (2023). https://doi.org/10.3390/mi14051064
R.A. Jaber, A. Kaseem, A.E. Hajj, L.A. El-Nimri, A.M. Haidar, High-performance and energy-efficient CNFET-based designs for ternary logic circuits. IEEE Access (2019). https://doi.org/10.1109/ACCESS.2019.2928251
P. Keshavarzian, R. Sarikhan, A novel CNTFET-based ternary full adder. Circuits Syst. Signal Process. 33, 665–679 (2014). https://doi.org/10.1007/s00034-013-9672-6
J. Kong, A. Javey, Carbon nanotube electronics (Springer, New York, 2013)
J. Ko, J. Kim, J. Jeong, T. Song, Exploration of ternary logic using T-CMOS for circuit-level design. IEEE Trans. Circuits Syst. I: Regular Papers (2023). https://doi.org/10.1109/TCSI.2023.3287274
S. Lin, Y.B. Kim, F. Lombardi, CNTFET-based design of ternary logic gates and arithmetic circuits. IEEE Trans. Nanotechnol. 10(2), 217–225 (2011). https://doi.org/10.1109/TNANO.2009.2036845
M. Maleknejad, S. Mohammadi, K. Navi, H.R. Naji, M. Hosseinzadeh, A CNTFET-based hybrid multi-threshold 1-bit full adder design for energy efficient low power applications. Int. J. Electr. 105(10), 1753–1768 (2018). https://doi.org/10.1080/00207217.2018.1477205
A. Malik, M. S. Hussain, and M. Hasan.: An Approximate Ternary Full Adder using Carbon nanotube field effect transistors, 2022 5th Int. Cont. on Multimedia, Signal Processing and Communication Technologies, India, pp. 1–6, (2022), https://doi.org/10.1109/IMPACT55510.2022.10029151.
M. Moaiyeri, M.Z. Taheri, Efficient passive shielding of MWCNT interconnects to reduce crosstalk effects in multiple-valued logic circuits. IEEE Trans. Electromagn. Compat. 61(5), 1593–1601 (2019). https://doi.org/10.1109/TEMC.2018.2863378
P. Muthukrishnan, S. Sathasivam, A technical survey on delay defects in nanoscale digital VLSI circuits. MDPI Appl. Sci. 12(18), 9103 (2022). https://doi.org/10.3390/app12189103
A. Panahi, F. Sharifi, M.H. Moaiyeri, K. Navi, CNTFET-Based approximate ternary adders for energy-efficient image processing application. Microprocess. Microsyst. (2016). https://doi.org/10.1016/j.micpro.2016.07.015
A. Raychowdhury, K. Roy, Carbon-nanotube-based voltage-mode multiple-valued logic design. IEEE Trans. Nanotechnol. 4(2), 168–179 (2005). https://doi.org/10.1109/TNANO.2004.842068
A. Sachdeva, D. Kumar, E. Abbasian, A carbon nano-tube field effect transistor-based stable, low-power 8T static random access memory cell with improved write access time. AEUE – Int. J. Electr. Commun. 162, 154565 (2023). https://doi.org/10.1016/j.aeue.2023.154565
S.K. Sahoo, G. Akhilesh, R. Sahoo, M. Muglikar, High-performance ternary half adder using CNTFET. IEEE Trans. Nanotechnol. (2017). https://doi.org/10.1109/TNANO.2017.2649548
I.M. Salehabad, K. Navi, M. Hosseinzadeh, Two novel inverter-based ternary full adder cells using CNFETs for energy-efficient applications. Int. J. Electron. (2019). https://doi.org/10.1080/00207217.2019.1636306
F.M. Sardroudi, M. Habibi, M.H. Moaiyeri, A low-power dynamic ternary full adder using carbon nanotube field-effect transistors. AEUE – Int. J. Electr. Commun. 131, 153600 (2021). https://doi.org/10.1016/j.aeue.2020.153600
S.K. Sinha, S. Chaudhury, Comparative study of leakage power in CNTFET over MOS device. J. Semicond. 35(11), 01–06 (2014). https://doi.org/10.1088/1674-4926/35/11/114002
S. K. Sinha, K. Kumar, S. Chaudhury.: CNTFET: the emerging post-CMOS device, International Conference on Signal Processing and Communication, pp. 372–374, (2013). https://doi.org/10.1109/ICSPCom.2013.6719815
I.M. Salehabad, K. Navi, M. Hosseinzadeh, Two novel inverter-based ternary full adder cells using CNTFETs for energy-efficient applications. Int. J. Electr. (2019). https://doi.org/10.1080/00207217.2019.1636306
Stanford University CNTFET model Website. Stanford University, Stanford, CA [Online], (2008). http://nano.stanford.edu/model.php?id=23
S. Tabrizchi, A. Panahi, F. Sharifi, Method for designing ternary adder cells based on CNFETs. IET Circuits Dev. Syst. 11(5), 465–470 (2017). https://doi.org/10.1049/iet-cds.2016.0443
F. Yang, X. Wang, D. Zhang et al., Chirality-specific growth of single-walled carbon nanotubes on solid alloy catalysts. Nature 510, 522–524 (2014). https://doi.org/10.1038/nature13434
F. Zahoor, M. Hanif, U.I. Bature, S. Bodapati, A. Chattopadhyay, F.A. Hussin, H. Abbas, F. Merchant, F. Bashir, Carbon nanotube field effect transistors: an overview of the device structure, modeling, fabrication, and applications. Phys. Scr. 98, 082003 (2023). https://doi.org/10.1088/1402-4896/ace855
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Malik, A., Hussain, M.S. & Hasan, M. Energy-Efficient Exact and Approximate CNTFET-Based Ternary Full Adders. Circuits Syst Signal Process 43, 2982–3003 (2024). https://doi.org/10.1007/s00034-023-02589-8
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DOI: https://doi.org/10.1007/s00034-023-02589-8