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Mixed Signal Integrated Circuit Design for Integrate-and-Fire Spiking Neurons

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Abstract

A new way of designing integrate-and-fire (IF) neuronal integrated circuits is presented. In contrast to other studies, a newly designed linear voltage-controlled current source is used to linearly convert the voltage signal representing the synaptic weights into a current signal and charge the membrane capacitor through the current mirror. The voltage of the membrane capacitor is then processed by another newly designed hysteresis comparator, which finally generates the output pulse signal and implements the IF neuron function. The mixed analog–digital structure makes the output of the circuit less susceptible to transistor mismatches. The design process draws on the best of current modern electronic design, such as band gap references, current mirrors and comparators, and is based on the 0.18 \(\upmu \)m process. Finally, the simulation program with integrated circuit emphasis verifies that the design is valid and feasible.

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Data Availability Statement

The datasets generated during the current study are available from the corresponding author on reasonable request.

References

  1. P. Allen, D. Holberg. CMOS Analog Circuit Design. 01 (2002)

  2. M. Bouvier, A. Valentian, T. Mesquida, F. Rummens, M. Reyboz, E. Vianello, E. Beigné. Spiking neural networks hardware implementations and challenges: a survey. (2020)

  3. M. Chu, B. Kim, S. Park, H. Hwang, M. Jeon, B.H. Lee, B.G. Lee, Neuromorphic hardware system for visual pattern recognition with memristor array and CMOS neuron. IEEE Trans. Ind. Electron. 62(4), 2410–2419 (2015)

    Article  Google Scholar 

  4. S. Ghosh-Dastidar, H. Adeli, Spiking neural networks. Int. J. Neural Syst. 19(04), 295–308 (2009)

    Article  Google Scholar 

  5. A.L. Hodgkin, A.F. Huxley, A quantitative description of membrane current and its application to conduction and excitation in nerve. J. Physiol. 117, 500 (1952)

    Article  Google Scholar 

  6. Y. Horio, T. Taniguchi, K.J.N. Aihara, An asynchronous spiking chaotic neuron integrated circuit. Neurocomputing 64(1), 447–472 (2005)

    Article  Google Scholar 

  7. G. Indiveri, B. Linares-Barranco, T.J. Hamilton, A.V. Schaik, R. Etienne-Cummings, T. Delbruck, S.C. Liu, P. Dudek, P.H. Fliger, S. Renaud, Neuromorphic silicon neuron circuits. Front. Neurosci. 5(73), 73 (2011)

    Google Scholar 

  8. A.K. Kamal, J. Singh, Simulation-based ultralow energy and high-speed lif neuron using silicon bipolar impact ionization mosfet for spiking neural networks. IEEE Trans. Electron Devices 67(6), 2600–2606 (2020)

    Article  Google Scholar 

  9. T. Kim, M.H. Oh, M.W. Kwon, B.G.J.E.L. Park, Integrate-and-fire spiking neuron circuit exhibiting spike-triggered adaptation through input current modulation with back gate effect. Electron. Lett. 54(17), 1022–1024 (2018)

    Article  Google Scholar 

  10. M.W. Kwon, K. Park, M.H. Baek, J. Lee, B.G. Park, A low-energy high-density capacitor-less if neuron circuit using feedback FET cointegrated with CMOS. IEEE J. Electron Devices Soc. 7(99), 1 (2019)

    Google Scholar 

  11. W. Maass, Networks of spiking neurons: the third generation of neural network models. Neural Netw. 10(9), 1659–1671 (1997)

    Article  Google Scholar 

  12. J. Rabaey, C. Anantha, N. Borivoje, Digital Intergrated Circuits: A Design Perspective, 2nd edn. (2012)

  13. B. Razavi. Design of Analog CMOS Integrate Circuits. (2001)

  14. H. Sungmin, K. Hyungjin, P. Jungjin, K. Min-Woo, B. Myung-Hyun, L. Jeong-Jun, P. Byung-Gook, System-level simulation of hardware spiking neural network based on synaptic transistors and if neuron circuits. IEEE Electron Device Lett. 39(9), 1441–1444 (2018)

    Article  Google Scholar 

  15. K. Taehyung, Y.S. Song, B.-G. Park, Overflow handling integrate-and-fire silicon-on-insulator neuron circuit incorporating a Schmitt trigger implemented by back-gate effect. J. Nanosci. Nanotechnol. 19, 6183–6186 (2019)

    Article  Google Scholar 

  16. X. Wu, V. Saxena, K. Zhu, A CMOS spiking neuron for dense memristor-synapse connectivity for brain-inspired computing, in International Joint Conference on Neural Networks (2015)

  17. R.N. Wulfram Gerstner, W.M. Kistler, L. Paninski,Neuronal Dynamics: From Single Neurons to Networks and Models of Cognition. (2014)

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Acknowledgements

This work is supported by the Science and Technology Program of Gansu Province (No. 20JR10RA080).

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  1. College of Physics and Electronic Engineering, Northwest Normal University, No. 967, East Anning Road, Lanzhou, 730070, Gansu, China

    Zhang Jie & Yin Baoquan

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  1. Zhang Jie
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  2. Yin Baoquan
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Correspondence to Zhang Jie.

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Jie, Z., Baoquan, Y. Mixed Signal Integrated Circuit Design for Integrate-and-Fire Spiking Neurons. Circuits Syst Signal Process 42, 27–46 (2023). https://doi.org/10.1007/s00034-022-02131-2

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