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High-Performance Parallel Implementation of Genetic Algorithm on FPGA

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Abstract

Genetic algorithms (GAs) are used to solve search and optimization problems in which an optimal solution can be found using an iterative process with probabilistic and non-deterministic transitions. However, depending on the problem’s nature, the time required to find a solution can be high in sequential machines due to the computational complexity of genetic algorithms. This work proposes a full-parallel implementation of a genetic algorithm on field-programmable gate array (FPGA). Optimization of the system’s processing time is the main goal of this project. Results associated with the processing time and area occupancy (on FPGA) for various population sizes are analyzed. Studies concerning the accuracy of the GA response for the optimization of two variables functions were also evaluated for the hardware implementation. However, the high-performance implementation proposed in this paper is able to work with more variable from some adjustments on hardware architecture. The results showed that the GA full-parallel implementation achieved throughput about 16 millions of generations per second and speedups between 17 and 170,000 associated with several works proposed in the literature.

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Acknowledgements

This study was financed in part by the Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)—Finance Code 001.

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  1. College of Engineering, Swansea University, Swansea, SA2 8PP, Wales, UK

    Matheus F. Torquato

  2. Department of Computer Engineering and Automation, Federal University of Rio Grande do Norte (UFRN), Natal, RN, 59078-970, Brazil

    Marcelo A. C. Fernandes

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Correspondence to Marcelo A. C. Fernandes.

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Torquato, M.F., Fernandes, M.A.C. High-Performance Parallel Implementation of Genetic Algorithm on FPGA. Circuits Syst Signal Process 38, 4014–4039 (2019). https://doi.org/10.1007/s00034-019-01037-w

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