Circuits, Systems, and Signal Processing

, Volume 36, Issue 9, pp 3585–3597 | Cite as

Memristor-Based Low-Power High-Speed Nonvolatile Hybrid Memory Array Design

  • Khandoker Asif Faruque
  • Baishakhi Rani Biswas
  • A. B. M. Harun-ur Rashid


In this paper, a memristor–transistor hybrid architecture-based nonvolatile memory array design approach has been proposed. Here, a single memory cell consists of a memristor and one transmission gate, whereas a conventional SRAM cell consists of six transistors. This proposed design has the advantage of being nonvolatile, having high switching speed and low power requirement. The proposed cell shows better performance in comparison with other published memristor–transistor hybrid memory cell.


Memristor Transmission gate Nonvolatile High speed Low power 


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Copyright information

© Springer Science+Business Media New York 2017

Authors and Affiliations

  • Khandoker Asif Faruque
    • 1
  • Baishakhi Rani Biswas
    • 1
  • A. B. M. Harun-ur Rashid
    • 1
  1. 1.Bangladesh University of Engineering and TechnologyDhakaBangladesh

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