Abstract
This paper studies the design and multiplierless realization of a digital down converter (DDC) in a high frequency (HF) radar receiver. The novel structure mainly consists of a fast Walsh transform (FWT) and an inverse fast Walsh transform (IFWT), both of which can be implemented using only addition and subtraction. Because the transform kernels of the FWT and the IFWT are the same, the implementation complexity of the DDC is significantly reduced. Simulation and field test results are given to demonstrate that the proposed method outperforms the common method and is suited for real-time signal processing of software digital down conversion in a digital signal processor (DSP), such as the ADSP21060.
Similar content being viewed by others
Author information
Authors and Affiliations
Corresponding authors
Rights and permissions
About this article
Cite this article
Bai, L., Wen, B. & Yang, J. Design and Implementation of DDC Based on Walsh Transform for HF Radar Receiver. Circuits Syst Signal Process 25, 745–752 (2006). https://doi.org/10.1007/s00034-005-1123-3
Issue Date:
DOI: https://doi.org/10.1007/s00034-005-1123-3