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Exploiting loop parallelism with redundant execution

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Abstract

In this paper, a new loop transformation is proposed that can exploit parallelism in loops which cannot be found by tradtional methods. Then the method is extended to show how to achieve maximum speedup of loops if there are infinite processors and how to balance the workload of parallel sections in loops if there is fixed number of processors.

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Authors and Affiliations

  1. Institute of Parallel Processing, Fudan University, 200433, Shanghai

    Tang Weiyu, Shi Wu, Zang Binyu & Zhu Chuanqi

Authors
  1. Tang Weiyu
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  2. Shi Wu
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  3. Zang Binyu
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  4. Zhu Chuanqi
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Additional information

Supported by National Natural Science Foundation of China, National ‘863’ High-Tech Programme and the Climbing Program.

Tang Weiyu received his B.S. degree in 1993 and M.S. degree in 1996 both in computer science from Fufan University. From fall 1996, he is a Ph.D. candidate in computer science at University of California, Irvine. His research interests include compilers, parallel processing and programming language.

Shi Wu received his B.S. degree in 1993 and M.S. degree in 1996 both in computer science from Fufan University. In the fall 1996, he became an Assistant Lecturer in Institute of Parallel Processing, Fudan University. His research interests are parallel processing and program analysis compiler.

Zang Binyu received his B.S. degree in 1987 and M.S. degree in 1990 both in computer science from Fufan University. He is currently a Lecturer in Institute of Parallel Processing, Fudan University. His research interests include compilers, parallel processing and algorithm.

Zhu Chuanqi received his B.S. degree in mathematics from Fufan University in 1965. From 1982 to 1988 he was a member of the Academic Staff at the Center for Supercomputing Research and Development at the University of Illinois at Urbana-Champaign. He is now a Professor of computer science in Fudan University and the Director of Institute of Parallel Processing, Fudan University. His research interests are interconnection networks, parallel processing, and computer architecture.

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Tang, W., Shi, W., Zang, B. et al. Exploiting loop parallelism with redundant execution. J. of Comput. Sci. & Technol. 12, 105–112 (1997). https://doi.org/10.1007/BF02951329

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  • DOI: https://doi.org/10.1007/BF02951329

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