Abstract
It is known that critical path test generation method is not a complete algorithm for combinational circuits with reconvergent-fanout. In order to make it a complete algorithm, we put forward a reconvergent-fanout-oriented technique, the principal critical path algorithm, propagating the critical value back to primary inputs along a single path, the principal critical path, and allowing multiple path sensitization if needed. Relationship among test patterns is also discussed to accelerate test generation.
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F. F. Sellerset al., Analyzing errors with the Boolean difference.IEEE Trans. Computers,C-17: 7 (1968), 676–683.
J. P. Roth, Diagnosis of automata failures: a calculus and method.IBM J. Res. Dev.,10: 4 (1966), 278–291.
J. P. Roth, Computer Logic, Testing and Verification. Computer Science Press, 1980.
C. W. Chaet al., 9-V algorithm for test pattern generation of combinational digital circuits.IEEE Trans. Computers,C-27: 3 (1978), 193–200.
Wei Daozheng, Test pattern generation for large combinational circuits.Chinese Journal of Computers,1: 2 (1978), 93–98.
Wei Daozheng, An algorithm for generating test patterns for functional level digital circuits—The principal path sensitization method.Chinese Journal of Computers,5: 2 (1982), 125–139.
P. Goel, An implicit enumeration algorithm to generate tests for combinational logic circuits.IEEE Trans. Computers,C-30: 3 (1981), 215–222.
P. Goel, PODEM-X, An Automatic Test Generation System for VLSI Logic Structures. Proc. 18th D.A. Conf, Jun. 1981, 260–268.
H. Fujiwaraet al., On the acceleration of test generation algorithm,IEEE Trans. Computers. C-32: 12 (1983), 1137–1144.
J. J. Thomas, Automated Diagnostic Test Programs for Digital Networks, Computer Design, Aug, 1971, 63–67.
M. A. Breueret al., Diagnosis and Reliable Design of Digital System, Computer Science Press, 1976, Chapter 2.
M. Abramoviciet al., Critical path tracing: An alternative to fault simulation.IEEE Design & Test of Computers,1: 3 (1984), 83–93.
M. Abramoviciet al., Critical Path Tracing: An Alternative to Fault Simulation Proc. 20th D. A. Conf., 1983, 214–220.
Lin Xiangdong, An improvement of critical path methodChinese Journal of Computer,7: 1 (1984), 90–97.
Y. Levendalet al., The *-Algorithm: Critical Traces for Functions and CHDL Construct. Proc. 13th FTCS, Jun. 1983, 90–97.
D. T. Wang, An algorithm for generation of test sets for combinational logic networks.IEEE Trans.Computers, C-24: 7 (1975), 742–746.
D. T. Wang, Properties of faults and criticalities of values under tests for combinational networks.IEEE Trans. Computers, C-24: 7 (1975), 746–750.
M. Abramoviciet al., SMART and FAST: Test generation for VLSI scan-design circuits.IEEE Design & Test of Computers. Aug. 1986 43–54.
P. R. Schneider, On the necessity to examineD Chains in diagnostic test generation—An example.IBM J. Res. Dev.,11: 1 (1967), 114.
S. E. Butner, An Automatic Test Pattern Generation: A Modular Approach. Proc. 3rd Annual International Phoenix Conference on Computers and Communications, 1984, 213–240.
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Zhou, Q., Wei, D. A complete critical path algorithm for test generation of combinational circuits. J. of Compt. Sci. & Technol. 6, 74–82 (1991). https://doi.org/10.1007/BF02943410
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DOI: https://doi.org/10.1007/BF02943410