Low-temperature epitaxy using Si₂H₆

Abstract

In the ULSI processes of the 1990s, the emphasis is expected to change from lateral to vertical down sizing in an attempt to achieve better device performance. Low-temperature CVD Si epitaxy will aid in this trend. It also offers the advantage of controllable selective deposition. We proposed three applications of low-pressure, low-temperature Si₂H₆ epitaxy with new designed reactors. One is half-micron epitaxy on buried layer. We successfully fabricated the bipolar transistor of half-micron epitaxy using the batch reactor of Si₂H₆ epitaxy. The other applications are formation of transistors having reduced parasitic capacitance and formation of shallow junction. These advanced applications require flexible conditions and low-temperature prebaking. We examined low temperature prebaking of 874° C using H₂ and of 800° C using SiH₂F₂ with the singlewafer reactor. Also, low-temperature epitaxy of 632° C was observed with the singlewafer reactor.