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Automated visual inspection of bare printed circuit boards using parallel processor hardware

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Abstract

This paper describes the research currently being conducted at Texas A&M University toward the automated visual inspection of bare printed circuit boards (PCBs) using non-referential algorithms. The first phase of the research includes the development of an efficient algorithm to filter the digitised image of the PCB once it has been received from the camera. The filter enhances the acquired image for easier processing by the system. The research is centred around the use of a commercially available parallel processor to perform this function. The reformatted image is then inspected for defects based on the design rules of the circuit board.

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Authors and Affiliations

  1. Department of Industrial Engineering, Quality Control Laboratory, Texas A&M University, 77843, College Station, Texas, USA

    J. W. Foster III, P. Griffin & J. D. Korry

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  1. J. W. Foster III
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  2. P. Griffin
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  3. J. D. Korry
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Foster, J.W., Griffin, P. & Korry, J.D. Automated visual inspection of bare printed circuit boards using parallel processor hardware. Int J Adv Manuf Technol 2, 69–74 (1987). https://doi.org/10.1007/BF02601477

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