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A weighted graph embedding technique and its application to automatic circuit Layout

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Abstract

The extension of a known technique for graph embedding is presented for the solution of a class of problems arising in computer aided circuit layout.

The embedding of a weighted graphX onto another weighted graphY is studied, with concurrent minimization of a cost function whose value depends on node and are associations. The embedding process is based on a partially enumerative covering technique on a Node Correspondence Table.

Two applications are described, namely the placement of electrical components on a card in printed circuit design, and the allocation of a cards in a rack for the optimal design of backboard connections. An example of this latter problem is discussed in detail.

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Authors and Affiliations

  1. Istituto per l'Elaborazione della Informaziene, C.N.R., Pisa, Italy

    G. Levi & F. Luccio

Authors
  1. G. Levi
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  2. F. Luccio
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Additional information

The research described in this report was carried out while the authors were visiting the Department of Electrical Engineering, New York University, and was supported by a New York State Post Doctoral Fellowship in Electrical Engineering, Number SSF (8)-23 and a National Science Foundation Senior Foreign Scientist Fellowship.

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Levi, G., Luccio, F. A weighted graph embedding technique and its application to automatic circuit Layout. Calcolo 8, 49–60 (1971). https://doi.org/10.1007/BF02575573

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  • DOI: https://doi.org/10.1007/BF02575573

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