Abstract
Optimization techniques for DSP circuits are described based on the design experience with a number of high-speed digital filter chips. These designs show that efficient high speed digital filter designs can be achieved using several optimizations at the architecture, circuit, and layout level. The problems of automating these optimizations in a general DSP synthesis environment are discussed, and possible CAD solutions are proposed.
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Duncan, P., Kindsfater, K., Liu, L. et al. Strategies for design automation of high speed digital filters. Journal of VLSI Signal Processing 9, 105–119 (1995). https://doi.org/10.1007/BF02406473
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DOI: https://doi.org/10.1007/BF02406473