Abstract
We present here an efficient systolic implementation for 3-D IIR digital filters. The systolic implementation is obtained by using an algebraic mapping technique. This new mapping technique gives us the choice to mix pipelined variables and broadcast variables. We also determine, through the mapping method, the buffer sizes, the direction of variables propagations and the data feeding and extracting points. The resultant systolic array implementation is a modular structure composed of 2-D filter modules connected by simple buffers. This new systolic implementation is regular, modular and amenable to VLSI Implementation.
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References
M. A. Sid-Ahmed “A Systolic Realization of 2-D,”IEEE Trans. Acoust. Speech, Signal Processing, vol. ASSP-37, 1989, pp. 560–565.
N. R. Shanbhag, “An Improved Systolic Architecture for 2-D Digital Filters,”IEEE Trans. Signal Processing, vol. 39, 1991, pp. 1195–1202.
S. Sunder,VLSI Implementation of Digital Filters, Ph.D Dissertation, University of Victoria, B.C., Canada, 1992.
R. A. Derbin, L. Carpenter, and P. Hanrahan, “Volume Rendering,”Computer Graphics (Proc. Siggraph 88), vol. 22, 1988, pp. 65–74.
S. Y. Kung,VLSI Array Processors, Prentice Hall, 1988.
H. T. Kung, “Why Systolic Architectures,”IEEE Computer mag., vol. 15, 1982, pp. 37–46.
S. Sunder, F. El-Guibaly, and A. Antoniou, “Systolic Implementation of Digital Filters,”Multidimensional Systems and Signal Processing, 1992, pp. 63–78.
P. R. Capello and K. Steiglitz, “Digital Signal Processing Applications of Systolic Algorithms,” inVLSI systems and computations, H. T. Kung, B. Sproull and G. Steel editors, Computer Science Press, 1981, pp. 245–254.
C. E. Leirseron and J. B. Saxe, “Optimizing Synchronous Systems,”Proc. IEEE 22nd Annual Symp. on Foundations of Computer Science, 1981, pp. 23–36.
J. P. Charlier, M. Vanbegin, and P. van Dooren, “Systolic Algorithms for Digital Signal Processing,”Philips J. Res., vol. 43, 1988, pp. 268–290.
P. Quinton, “Automatic Synthesis of Systolic Arrays from Uniform Recurrent Equations,” inProc. 11-th Intl. Symp. on Computer Architecture, Ann Arbor, MI, 1984, pp. 208–214.
P. Quinton, “The Systematic Design of Systolic Arrays,”Tech. Rep. 216, Institute National de Recherche en Informatique et en Automatique INRIA, July 1983.
D. Moldovan, “On the Design of Algorithms for VLSI Systolic Arrays,”Proc. IEEE, vol. 71, 1983, pp. 113–120.
W. M. Miranker and A. Winkler, “Space-time Representation of Computational Structures,”Computing, vol. 32, 1984, pp. 93–114.
S. K. Rao,Regular Iterative Algorithms and Their Implementation on Processor Arrays, Ph.D. Thesis, Stanford, 1985.
M. S. Lam and J. A. Mostow, “A Transformational Model of VLSI Systolic Design,”IEEE Computer mag., vol. 18, 1985, pp. 42–52.
J. M. Delosme and I. C. F. Ipsen, “Efficient Systolic Arrays for the Solution of Toeplitz Systems: An Illustration of a Methodology for the Construction of Systolic Architectures for VLSI,” inInternational Workshop on Systolic Arrays, W. Moore, A. McCabe, and R. Urquhart, editors, Adam Hilger, University of Oxford, UK., 1986.
H. V. Jagadish, S. K. Rao, and T. Kailath, “Array Architectures for Iterative Algorithms,”Proc. IEEE, vol. 75, 1987, pp. 1304–1321.
P. Quinton and V. Van Dongen, “The Mapping of Linear Recurrence Equations on Regular Arrays,”Technical report 485, Publication Interne IRISA, pp. 37, July, 1989.
Yoav Yaacoby and P.R. Cappello, “Scheduling a System of Nonsingular Affine Recurrence Equations onto a Processor Array,”J. VLSI Signal Processing, vol. 1, 1989, pp. 115–125.
S. V. Rajopadhye, “Synthesizing Systolic Arrays with Control Signals from Recurrence Equations,”Distributed Computing, vol. 3, 1989, pp. 88–105.
F. El-Guibaly, A. Tawfik, W.-S. Lu, and E. Abdel-Raheem, “Synthesizing Systolic Arrays: Basic Tools,”Technical Report VMC 92–2, ECE Dept., University of Victoria, 1992.
R. M. Karp, R. E. Miller, and S. Winograd, “The Organization of Computations for Uniform Recurrence Equations,”J. Assoc. Computing Machinery, vol. 14, 1967, pp. 563–590.
G. L. Nemhause and L. A. Wolsey,Integer and Combinatorial Programming, John Wiley, 1988.
F. P. Preparata and M. I. Shamos,Computational Geometry, New York: Springer-Verlag, 1985.
A. Schrijver,Theory of Linear and Integer Programming, New York: John Wiley, 1986.
Convex Analysis, Princeton University Press, 1970.
D. S. Watkins,Fundamentals of Matrix Computations, New York: John Wiley, 1991.
L. L. Scharf,Statistical Signal Processing, Reading, MA: Addison-Wesley, 1991.
G. H. Golub and C. F. Van Loan,Matrix Computations, Baltimore, Maryland: Johns Hopkins University Press, 1989.
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El-Guibaly, F., Tawfik, A. Mapping 3-D IIR digital filter onto systolic arrays. Multidim Syst Sign Process 7, 7–26 (1996). https://doi.org/10.1007/BF02106104
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DOI: https://doi.org/10.1007/BF02106104