Abstract
In this paper we present results in the development of decimation-in-frequency algorithms for a family of discrete sine and cosine transforms. They are closely related to the decimation-in-time algorithms developed by Yip and Rao [1]. The complexity of the algorithms was examined through the number of multiplications and additions as well as the number of different constants required in the transforms. It was found that the decimation-in-frequency approach provides a viable alternative to other fast algorithms for the discrete sine and cosine transforms. In particular, the recursive and modular structure of the algorithms lends itself readily to possible hardware realization.
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This work was supported in part by NSERC Grant No. A3635.
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Yip, P., Rao, K.R. The decimation-in-frequency algorithms for a family of discrete sine and cosine transforms. Circuits Systems and Signal Process 7, 3–19 (1988). https://doi.org/10.1007/BF01600005
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DOI: https://doi.org/10.1007/BF01600005