Übersicht
Zur Planaritatsanalyse und Planarisierung nichtebener verallgemeinerter Graphen werden programmierbare Algorithmen angegeben. Die Planarisierung erfolgt durch zwei Operatoren für Inzidenztransformationen, die in jeder Technologie einen bestimmten Begriffsinhalt haben.
Contents
Programable algorithms for planarity analysis and planarization of generalized graphs are given. The planarization is carried out by means of two operators for incidence transformations. These operators have a certain significance in each technology.
Abbreviations
- A :
-
Trägermenge
- a :
-
Element der Trägermenge
- F :
-
Fenster
- G :
-
Graph
- \(\overline G \) :
-
Schaltungsgraph
- G * :
-
Hamiltongraph
- G 2 :
-
Binärgraph
- J :
-
Jordan-Masche
- K :
-
Kontur eines Fensters
- R :
-
Relation
- r :
-
Element der Relation
- :
-
Erweiterung, Neg−∼
- :
-
Äquipotential-Erweiterung, Neg−∼
- :
-
Reduktion, Neg −∼
- \(\mathfrak{P}\) :
-
Planarisierung
Literatur
Engl, W. L.; Mlynski, D. A.: Schaltungsintegration als graphentheoretisches Syntheseproblem. Arch. f. Elektrotechnik Band 54 (1972) 315–324.
Engl, W. L.; Mlynski, D. A.: An Algorithm for Embedding Graphs in the Plane with Certain Constraints. IEEE Workshop on Computer-Aided Design Technology for Integrated Electronics, Burlington, Vt., July 1967.
Engl, W. L.; Mlynski, D. A.: Embedding a Graph in a Plane with Certain Constraints. IEEE Trans. on Circuit Theory, CT-17 (1970), pp. 250–252.
Engl, W. L.; Mlynski, D. A.: Topological Synthesis Procedure for Circuit Integration. 1969 IEEE Intern. Solid-State Circuit Conference, Digest of Technical Papers pp. 138–139.
Engl, W. L.; Mlynski, D. A.: A Graph Theoretical Layout Procedure for Integrated Circuits. 1969 IEEE Intern. Symposium on Circuit Theory, Symposium Digest pp. 37–39.
Engl, W. L.; Mlynski, D. A.: An Interactive Layout Procedure for Integrated Circuits. Proc. Kyoto Intern. Conference on Circuit and System Theory 1970, pp. 65–66.
Auslander, L.; Parter, S. V.: On Embedding Graphs in the Sphere. J. Math. Mech. 10 (1961) 517–523.
Bader, W.: Das topologische Problem der gedruckten Schaltung und seine Lösung. Arch. f. Elektrotechnik 49 (1964) S. 2–12.
Goldstein, A. J.: An Efficient and Constructive Algorithm for Testing Wether a Graph Can be Embedded in the Plane. Private communication.
Fisher, G. J.; Wing, O.: Computer Recognition and Extraction of Planar Graphs from the Incidence Matrix. IEEE Trans. on Circuit Theory, CT-13, (1966), pp. 154 to 163.
Hotz, G.: Einbettung von Streckenkomplexen in die Ebene. Math. Annalen 167 (1966) S. 214–223.
Weinberg, L.: Two New Characterizations of Planar Graphs. Proc. Fifth Allerton Conf. on Circuit and System Theory, Univ. of Illinois, October 1967.
Author information
Authors and Affiliations
Rights and permissions
About this article
Cite this article
Engl, W.L., Mlynski, D.A. Die Lösung des Problems der topologischen Schaltungsintegration. Archiv f. Elektrotechnik 54, 325–336 (1972). https://doi.org/10.1007/BF01575933
Received:
Revised:
Issue Date:
DOI: https://doi.org/10.1007/BF01575933