Abstract
A novel approach that employs ordered binary decision diagrams (OBDDs) is contributed to factorize multi-level logic functions by requiring as few literals as possible. A logic function with PLA format is represented as an OBDD form first. A heuristic decision method of variable ordering, called theorder lookahead method, is derived for the construction of OBDDs. This method is based on the constant cofactor and the number of erasable logic terms for each input variable. The total execution time of the OBDD construction by the above ordering decisions is very fast for some MCNC benchmarks. With the above OBDDs, we introduce a simple yet effective graph manipulation, calledEXT, to obtain a minimal number of literals in the Boolean function. This greedyEXT algorithm consists mainly of two phases. The first phase, calledgraph analysis, identifies the similarities between nodes on the same level in the OBDD. The second phase, calledtree analysis, utilizes the above features to extract the common parts of the nodes. TheEXT procedure runs from the bottom level up to the top level of the OBDD. The computational complexity depends on the number of nodes in the OBDD. The results of simulations show thatEXT has a very fast CPU execution time and a competitive literal ratio with other methods for some MCNC benchmarks.EXT will produce the smallest literal number, especially for structured or symmetric circuits.
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This work was supported, in part, by the National Science Council, Republic of China, under contract number NSC 83-0404-E009-010.
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Hsiao, PY., Liaw, RT. & Su, JY. Using ordered binary decision diagrams to factorize multi-level logic. Circuits Systems and Signal Process 15, 361–376 (1996). https://doi.org/10.1007/BF01182592
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DOI: https://doi.org/10.1007/BF01182592