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Realization of automata by asynchronous logical circuits

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Cybernetics Aims and scope

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Literature Cited

  1. D. E. Muller and W. S. Bartky, “A theory of asynchronous circuits,” Proc. Int. Symp. on Switching Theory, Ann. Computation Lab. of Harvard Univ., No. 29 (1959).

  2. J. H. Tracey, “Internal state assignments for asynchronous sequential machines,” IEEE Trans. Electron. Comput.,EC-15 (August 1966).

  3. D. B. Armstrong, A. D. Friedman, and P. R. Menon, “Realization of asynchronous sequential circuits without inserted delay elements,” IEEE Trans. Comput.,C-17 (February 1968).

  4. J. Hlavička, “Essential hazard correction without the use of delay elements,” IEEE Trans. Comput.,C-19 (March 1970).

  5. A. N. Chebotarev, “Hazards in asynchronous logical circuits,” Kibernetika, No. 4 (1976).

  6. A. N. Chebotarev, “Circuits and automata. I,” Kibernetika, No. 5 (1976).

  7. A. N. Chebotarev, “Decomposition of asynchronous logical circuits. I,” Kibernetika, No. 2 (1978).

  8. A. N. Chebotarev, “Decomposition of asynchronous logical circuits. II,” Kibernetika, No. 4 (1978).

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Authors
  1. V. N. Nikolenko
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Translated from Kibernetika, No. 5, pp. 21–27, September–October, 1979.

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Nikolenko, V.N. Realization of automata by asynchronous logical circuits. Cybern Syst Anal 15, 627–634 (1979). https://doi.org/10.1007/BF01071211

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  • DOI: https://doi.org/10.1007/BF01071211

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