Skip to main content
Log in

Mapping the index set of algorithm variables to a systolic structure

  • Published:
Cybernetics and Systems Analysis Aims and scope

Abstract

A formalized procedure is proposed for determining the input/out sequence and the stepping of variables in systolic or semisystolic computers. The procedure is applicable to the design of systolic arrays, as well as to existing computers.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Similar content being viewed by others

Literature Cited

  1. V. P. Aksennov, P. Ya. Krasinskii, and G. V. Spiridonov, “Systolic algorithms and processors,” Zarubezhnaya Radioelektron., No. 7, 7–33 (1987).

    Google Scholar 

  2. R. M. Karp, R. E. Miller, and S. Winograd, “The organization of computation for uniform recurrence equation,” J. ACM,14, 563–590 (1967).

    Google Scholar 

  3. V. V. Voevodin, Mathematical Models and Methods in Concurrent Processes [in Russian], Nauka, Moscow (1986).

    Google Scholar 

  4. D. I. Moldovan, “On the analysis and synthesis of VLSI algorithms,” IEEE Trans. Comput.,C-31, 1121–1126 (1983).

    Google Scholar 

  5. P. Quintion, “The systematic design of systolic arrays,” IRISA Res. Rep. No. 216, INRIA (1983).

  6. Yu. S. Kanevskii and D. V. Korchev, “Synthesis method for the multidimensional time development of computation in systolic processors,” Élektron. Modelirovanie, No 4, 43–49 (1990).

    Google Scholar 

  7. Yu. S. Kanevskii, “Formalized design of concurrent computing structures,” in: Arithmetic, Organization Principles, Formalized Design, and Diagnostics of Computing Structures and Devices [in Russian], Vishcha Shkola, Kiev (1989), pp. 115–170.

    Google Scholar 

  8. D. I. Ivens (ed.), Concurrent Processing Systems [Russian translation], Mir, Moscow (1985).

    Google Scholar 

  9. A. V. Oppenheim and R. W. Schafen, Digital Signal Processing, Prentice Hall, Englewood Cliffs, NJ (1975).

    Google Scholar 

  10. Yu. S. Kanevskii and D. V. Korchev, “An integrated approach to the design of DFT systolic processors,” Radioélektronika, No. 9, 61–66 (1990).

    Google Scholar 

  11. D. V. Korchev and I. I. Sinichuk, “Mapping the index set of algorithm variables on a systolic structure,” in: Logical Design Methods of Homogeneous and Systolic Structures, Proc. 1st All-Union Seminar [in Russian], Inst. Probl. Peredachi Inf. Akad. Nauk SSSR, Moscow (1988), pp. 105–107.

    Google Scholar 

  12. R. Horn and C. Johnson, Matrix Analysis [Russian translation], Mir, Moscow (1989).

    Google Scholar 

  13. V. V. Kos'yanchuk, N. A. Likhoded, and P. I. Sobolevskii, Design of Systolic Computers Using Two-Dimensional Convolution [in Russian], Preprint Inst. Mat. Akad. Nauk BSSR, Minsk (1988).

  14. S. G. Sedukhin, Systematic Approach to the Design of VLSI Computing Structures [in Russian], Preprint Sib. Otd. Vychisl. Tsent. Akad. Nauk SSSR, Novosibirsk (1985).

  15. C. K. Ko and O. Wing, “Mapping strategy for automatic design of systolic arrays,” Proc. Int. Conf. on Systolic Arrays, San Diego, CA, May 25–27, 1988, San Diego (1988), pp. 285–294.

Download references

Authors

Additional information

Translated from Kibernetika, No. 1, pp. 51–57, January–February, 1991.

Rights and permissions

Reprints and permissions

About this article

Cite this article

Kanevskii, Y.S., Korchev, D.V. Mapping the index set of algorithm variables to a systolic structure. Cybern Syst Anal 27, 67–76 (1991). https://doi.org/10.1007/BF01068648

Download citation

  • Received:

  • Issue Date:

  • DOI: https://doi.org/10.1007/BF01068648

Keywords

Navigation