Design principles of code converters for digital high-speed processing systems

Conclusions

The final selection of a structure for a code converter depends to a great extent on the potentialities of the system elements under consideration and represents a compromise between many such contradictory factors as conversion time τ of a single binary digit, reliability T, cost G (or amount of equipment V), etc. If the importance of these parameters is represented as a system of weights, g₁∶: g₂∶: g₃ then finally the “quality” of any j-th version can be represented by the sum

$$\sigma _j = q_1 \left( {1 - \frac{{|\Delta G_j |}}{{|\Delta G_{\max } |}}} \right) + q_2 \left( {1 - \frac{{|\Delta T_j |}}{{|\Delta T_{\max } |}}} \right) + q_2 \left( {1 - \frac{{|\Delta \tau _j |}}{{|\Delta \tau _{\max } |}}} \right),$$

((27))

where ΔG_max, ΔT_max, and Δτ_max are the differences between the best and worst values of parameters in the versions under consideration; ΔG_j, ΔT_j, and Δτ_j are the differences between the best values and those obtained in the j-th version. The final selection of the version is obtained from the maximum value of σ.

For a preliminary selection of versions in evaluating (27) a simpler criterion is more convenient

$$\min \Pi _j - V_j \tau _j ,$$

((28))

since G and T have a functional relationship to the existing system of elements and to the equipment complications which are determined by the number of logical elements in the decoder, corrector, and in the shift and carry circuits. The expected timeτ _j is evaluated from the structure of any complete tetrade of digits as the sum

$$\tau _j \geqslant \beta _j \Delta \tau _t + (\gamma _j + \delta _j )\Delta \tau _\iota $$

((29))

where β(inj) is the maximum number of any trigger's operations between cycles k and k+1 of the converter,γ _j and δ_j are the maximum number of logical elements which pass consecutively the shift and correction signals respectively, Δτ_ι and Δτ_t are the switching durations of the logical and tetrade elements.