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Image processing on a memory array architecture

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Abstract

In this paper we examine the usefulness of a simple memory array architecture to several image processing tasks. This architecture, called theAccess Constrained Memory Array Architecture (ACMAA) has a linear array of processors which concurrently access distinct rows or columns of an array of memory modules. We have developed several parallel image processing algorithms for this architecture. All the algorithms presented in this paper achieve a linear speed-up over the corresponding fast sequential algorithms. This was made possible by exploiting the efficient local as well as global communication capabilities of the ACMAA.

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Authors and Affiliations

  1. Erik Jonsson School of Engineering & Computer Science, University of Texas at Dallas, P.O. Box 830688, 75083, Richardson, TX

    P. T. Balsara

  2. Department of Computer Science, Pennsylvania State University, 16802, University Park, PA

    M. J. Irwin

Authors
  1. P. T. Balsara
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  2. M. J. Irwin
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Balsara, P.T., Irwin, M.J. Image processing on a memory array architecture. J VLSI Sign Process Syst Sign Image Video Technol 2, 313–324 (1991). https://doi.org/10.1007/BF00925473

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  • DOI: https://doi.org/10.1007/BF00925473

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