VASS—A VLSI array system synthesizer

  • Jinn-Wang Yeh
  • Wen-Jiunn Cheng
  • Chein-Wei Jen


This paper presents a computer-aided design environment called VASS, which assists the VLSI array design. It applies a systematic methodology to synthesize a competitive array system from a behavioral description. Special features include the multiple projection and the two level pipeline techniques. Several crucial issues are considered and some practical solutions are incorporated into VASS. For example, an effective approach is used to transport all the interior I/O to the boundaries of the array. Besides, VASS can generate a kind of control signals, called tags, which propagate with data through the whole array to specify the appropriate functions of each processing element at the appropriate time step. Also, based on the inherent characteristics of the systolic algorithms, a high level synthesis method is proposed to facilitate the datapath generation of processing elements in the resultant array. The automatic specification of control signals and datapath generation of the processing elements render VASS a complete VLSI array system synthesizer. With VASS, one can quickly inspect various array implementations for an algorthm and iteratively improve them to meet the demands of an application-specific VLSI array system.


Functional Unit Processing Element Dependence Graph Systolic Array Array Processor 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Kluwer Academic Publishers 1996

Authors and Affiliations

  • Jinn-Wang Yeh
    • 1
  • Wen-Jiunn Cheng
    • 1
  • Chein-Wei Jen
    • 1
  1. 1.Department of Electronics Engineering & Institute of ElectronicsNational Chiao Tung UniversityHsinchuTaiwan, R.O.C.

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