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VASS—A VLSI array system synthesizer

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Abstract

This paper presents a computer-aided design environment called VASS, which assists the VLSI array design. It applies a systematic methodology to synthesize a competitive array system from a behavioral description. Special features include the multiple projection and the two level pipeline techniques. Several crucial issues are considered and some practical solutions are incorporated into VASS. For example, an effective approach is used to transport all the interior I/O to the boundaries of the array. Besides, VASS can generate a kind of control signals, called tags, which propagate with data through the whole array to specify the appropriate functions of each processing element at the appropriate time step. Also, based on the inherent characteristics of the systolic algorithms, a high level synthesis method is proposed to facilitate the datapath generation of processing elements in the resultant array. The automatic specification of control signals and datapath generation of the processing elements render VASS a complete VLSI array system synthesizer. With VASS, one can quickly inspect various array implementations for an algorthm and iteratively improve them to meet the demands of an application-specific VLSI array system.

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Authors and Affiliations

  1. Department of Electronics Engineering & Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan, R.O.C.

    Jinn-Wang Yeh, Wen-Jiunn Cheng & Chein-Wei Jen

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  1. Jinn-Wang Yeh
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  2. Wen-Jiunn Cheng
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  3. Chein-Wei Jen
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Additional information

This work was supported by the National Science Council, Taiwan, ROC, under Grant NSC-82-0404-E009-225.

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Yeh, JW., Cheng, WJ. & Jen, CW. VASS—A VLSI array system synthesizer. J VLSI Sign Process Syst Sign Image Video Technol 12, 135–158 (1996). https://doi.org/10.1007/BF00924523

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