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Analyse d'un algorithme de gestion simultanée mémoire centrale — disque de pagination

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Summary

Commonly used memory management strategies in a paged environment optimize separately the page-fault rate (by proper choice of a replacement algorithm) and the response time of the paging drum (by a shortest-access-time-first discipline with multiple sectors). In this paper we consider replacement strategies which attempt to maximize useful CPU utilisation and hence throughput by choosing the page to be replaced on the basis of its probability of reference as well as on the rapidity with which the page can be removed from main memory, assuming that a fixed-head disk or drum is used as a secondary memory. An analysis of the approach is given using a mathematical model. Analytical results for the gain in CPU utilisation are obtained under mono-programming and numerical examples are presented illustrating the effects of variation of program behaviour and of variants of the replacement strategy.

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Références

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Authors and Affiliations

  1. Département de Mathématiques, Centre Scientifique et Polytechnique Université de Paris XIII, F-93, Saint Denis, France

    E. Gelenbe

  2. Laboratoire de Recherche en Informatique et Automatique, IRIA, 78, Rocquencourt, France

    E. Gelenbe &  D. Potier

  3. C.N.R.S., Département de Mathématiques et Informatique, Université de Rennes, F-35, Rennes, France

    J. Lenfant

Authors
  1. E. Gelenbe
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  2. J. Lenfant
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  3. D. Potier
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Gelenbe, E., Lenfant, J. & Potier, D. Analyse d'un algorithme de gestion simultanée mémoire centrale — disque de pagination. Acta Informatica 3, 321–345 (1974). https://doi.org/10.1007/BF00263587

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  • DOI: https://doi.org/10.1007/BF00263587

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