Memristor Based Full Adder Circuit for Better Performance
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In this paper, we have designed memristor based AND, OR, and exclusive-OR (XOR) gates. With the help of these gates, memristor based full adder circuit has proposed. Simulation results of the proposed circuit including all above gates have been reported. Prominent improvement of the proposed circuit has been represented in power consumption 54.74%, delay 14.84%, and lesser transistor count with respect to conventional circuit.
KeywordsMemristor Full adder Logic gates Power consumption Delay Transistor count
Muhammad Khalid acknowledges DST-PURSE program, Central Instrumentation Facility (CIF), Jamia Millia Islamia Central University, New Delhi, for award of post doctoral fellowship.
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