Optimized designs of low loss non-blocking optical router for ONoC applications
- 3 Downloads
Recently, optical network on chip (ONoC) has attracted the attention of researchers as a promising technology for low power and high bandwidth on chip communication. ONoC improves the computational efficiency of multi-core processors and chips. However, their performance suffers from power losses and limited scalability. In this paper, we present two innovative designs of five port non-blocking ONoC routers constructed by using micro-ring resonators and waveguides for low power losses and the optimum number of components. We compared the performance of the designed routers with previously reported optical routers for the power insertion loss and the requirement of micro-ring resonators. The result shows that proposed optical routers have the lowest power losses and require a lower number of micro-ring resonators. First proposed router has 1.3% lower average loss and 9.8% lower maximum port to port loss as compared to Cygnus router. The second proposed router has 4.8% lower average loss than Cygnus router. The results also show that the performance of both the routers is far better than the crossbar router. The second proposed router requires only fifteen micro-ring resonators, that is 6% lower than Cygnus router.
KeywordsCrossbar Cygnus Optical network on chip Optical router Micro-ring resonator Non-blocking
Compliance with ethical standards
Conflict of interest
All authors declare that they have no conflict of interest.
- 3.Horowitz MA, Alon E, Patil D, Naffziger S, Kumar R, Bernstei K (2005) Scaling, power, and the future of CMOS. In: IEEE International Electron Devices Meeting IEDM Technical Digest, pp 7–15. https://doi.org/10.1109/IEDM.2005.1609253
- 7.Nicolescu G, Nikdast M, Beux SL, Xu J (eds) (2017) Photonic interconnects for computing systems: understanding and pushing design challenges. River Publishers, WhartonGoogle Scholar
- 9.Gu H, Xu J, Wang Z (2008) ODOR: a microresonator-based high performance low-cost router for optical networks-on-chip. In: Proc 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis, Atlanta, pp 203-208. https://doi.org/10.1145/1450135.1450181
- 10.Shacham A, Lee BG, Biberman A, Bergman K, Carloni LP (2007) Photonic NoC for DMA communications in chip multiprocessors. In: 15th Annual IEEE Symposium on high performance interconnects, Stanford, pp 29–38. https://doi.org/10.1109/HOTI.2007.9
- 14.Gu H, Mo KH, Xu J, Zhang W (2009) A low-power low-cost optical router for optical networks-on-chip in multiprocessor systems-on-chip. In: IEEE computer society annual symposium on VLSI, pp 19–24. https://doi.org/10.1109/ISVLSI.2009.19
- 19.Bergman K, Shalf J, Hausken T (2016) Optical interconnects and extreme computing. Opt Photonics 27:32–39Google Scholar
- 21.Poon AW, Xu F, Luo X (2008) Cascaded active silicon microresonator array cross-connect circuits for WDM networks-on-chip. Proc SPIE Int Soc Opt Eng 6898:12–21Google Scholar
- 23.Zhang B, Cheng Q, Shen W, Hao Q, Zhao J (2016) A low-cost strictly non-blocking micro-ring based 4×4 on-chip optical router. In: Proc IEEE optical interconnects conference (OI), San Diego, pp 36–37. https://doi.org/10.1109/OIC.2016.7482973