Smart grid security with AES hardware chip

Original Research
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Abstract

Smart grid is the upgradation of the existing grid in terms of cost, communication infrastructure, internet of things and reliable technologies. In ambitious flagship programme of digital India-project an initiative of India, the potential fields of the missions are identified in the area are smart energy, smart grids, smart homes and smart cities. More than 100 smart cities are planned for information and communication technology driven solutions with big data analytics in India. The exponential growth in smart grids has given certain security risks, cyber threats and protection of stored data as Nation security. Smart Grids, comprising of several communication, monitoring intelligent, metering and electrical equipment used in power grid, have a greater exposure to grid security and cyber-attacks which are potentially disrupt distribution in a city. The paper discusses the electrical grid, challenges in smart grid and the use of Advanced Encryption Standard (AES) algorithm enable with field-programmable gate array (FPGA) hardware in smart grids. The AES encryption and decryption chip is designed in Xilinx ISE 14.2 software, synthesized on SPARTAN-3E FPGA and verified with some test cases to ensure that AES can be employed in smart grid security and communication infrastructure.

Keywords

Smart grid communication Security FPGA synthesis AES algorithm 

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Copyright information

© Bharati Vidyapeeth's Institute of Computer Applications and Management 2018

Authors and Affiliations

  • Niraj Kumar
    • 1
  • Vishnu Mohan Mishra
    • 2
  • Adesh Kumar
    • 3
  1. 1.Department of Electronics and Communication EngineeringUttarakhand Technical UniversityDehradunIndia
  2. 2.Department of Electrical EngineeringGovind Ballabh Pant Engineering CollegePauri-GarhwalIndia
  3. 3.Department of Electronics, Instrumentation and Control EngineeringUniversity of Petroleum and Energy StudiesDehradunIndia

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