A Chaos-Based Complex Micro-instruction Set for Mitigating Instruction Reverse Engineering
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Chaos computing provides a large number of functions from a single hardware. Large-scale reconfigurability can be achieved flexibly by tuning only a few parameters from a chaos-based computing system. Implementation of reconfigurable complex functions from a single chaos circuit can alleviate area and power concerns due to decreasing technology nodes. It is possible to make a multi-input multi-output complex instruction set using the chaos-generated functionalities where operations are more uniform than conventional implementations. Lack of uniformity in implementation of instructions in traditional computing system provides opportunity for attackers to reverse engineer based on side channel power analysis. In this paper, it is proposed that chaos-based implementation of a complex instruction set is immune to classification-based reverse engineering attack. Cross obfuscation and self obfuscation schemes are proposed in this work which leverage reconfigurability of chaotic system for obfuscating the power profile of the instruction set and it has been made immune to reverse engineering attacks. The design utilizes 3-input multi-output instructions by using a single chaotic iterative map. We analyzed the immunity of this design against classification-based reverse engineering attack for six different classification algorithms with five dimensionality reduction techniques.
KeywordsChaos computing Side channel Power profile Obfuscation Instruction classification Hardware security
This work is based upon work supported by the Air Force Office of Scientific Research under award number FA9550-16-1-0301.
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