Design of a high-sampling-rate electronic module for array-detector positron annihilation lifetime measurements
- 21 Downloads
In this study, a high-time-resolution electronic module with a high channel density and low power consumption was designed for the measurement of the multi-detector array positron annihilation lifetimes. This electronic module consisted of 32 input channels, and each channel provided a high sampling rate up to 5.12 GSPS based on a Domino Ring Sampler 4 (DRS4) chip. Compared to the high-speed flash analog-digital converter (FADC), DRS4 chip has a higher channel density with an affordable lower price and power consumption.
The developed electronic module was also capable of real-time data analysis for directly extracting the time information of input signals at the data acquisition site, thereby significantly decreasing the data rate. The digital constant fraction discriminator (DCFD) algorithm was implemented in the field programmable gate array (FPGA) for performing the time pick-up.
The coincidence time resolution of the electronic module was measured, and the test results revealed a value of 26 ps. A prototypical 16-pixel detector module of the multi-detector system was evaluated using this electronic module, and the coincidence time resolution of the prototypical module was 411.84 ps.
The electronic module was confirmed to satisfy the severe requirements of the multi-array-detector positron annihilation lifetime measurement system. It was also suitable for other high-time-resolution, high-channel-density, cost-effective, and low-power-consumption applications.
KeywordsDigital constant fraction discriminator FPGA DRS4 Positron lifetime
This work was supported in part by the National Natural Science Foundation of China (Grant Nos. 11475206, 11675191 and 11475197).
- 15.DRS4 datasheet rev. 0.9. https://www.psi.ch/drs/DocumentationEN/DRS4_rev09.pdf
- 18.DRS4 Evaluation Board Rev. 5.1 manual. https://www.psi.ch/drs/DocumentationEN/manual_rev51.pdf