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FDSOI-Based Area and Power-Efficient Robust Negative Charge Pump for Localized Body Bias Generator

  • Arpit JainEmail author
  • Kavita Khare
  • Alok Kumar Tripathi
Short Communication

Abstract

This work exhibits an area-efficient negative charge pump (NCP) solution for an on-chip localized body bias generator (BBG) which has almost zero settling time for use in critical path replicas clearance. Also, the proposed circuit incorporates process and voltage compensation and dynamic energy optimization. Its temperature variation trend is regular and justified. The negative charge pump is implemented using Cadence Virtuoso for design and Eldo for simulation with 28-nm ultra thin body and box—fully depleted silicon on insulator (UTBB-FDSOI) for 0.85–1.3 V inputs. The implemented design is single-stage design, so it is area efficient. Its area occupancy is 2.94 µm2 and power occupancy is 34 µW. Negative charge pump-based body bias generator can be sprinkled with standard cells to enhance performance and robustness of the design.

Keywords

Body bias generator VLSI Negative charge pump UTBB-FDSOI Standard cell 

Notes

Acknowledgements

The authors would like to thank STMicroelectronics, India for CAD tools and access to technology.

References

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Copyright information

© The National Academy of Sciences, India 2019

Authors and Affiliations

  • Arpit Jain
    • 1
    Email author
  • Kavita Khare
    • 1
  • Alok Kumar Tripathi
    • 2
  1. 1.MANITBhopalIndia
  2. 2.STMicroelectronicsGreater NoidaIndia

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