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Journal of Cryptographic Engineering

, Volume 8, Issue 4, pp 315–326 | Cite as

Another dimension in integrated circuit trust

  • John DeVale
  • Ryan Rakvic
  • Kevin Rudd
Regular Paper

Abstract

Although 3D integrated circuit technology has typically been used to solve specific design goals, it has great potential for protecting intellectual property from theft or unwanted modification while at a third-party fabrication facility. We present analysis of a technique for splitting a design across multiple die layers for this purpose. From the perspective of a third-party, this technique effectively encrypts the circuit, preventing unauthorized use of, or alteration to, the design. The device is “unencrypted” at a secure final assembly location where it is oriented and bonded according to its secret key. As is true for any cryptographic technique, analysis of the algorithm or implementation may result in attacks with lower combinatorial complexity. We look at some of these potential attacks and discuss a number of possible solutions. Finally, we introduce the inter-die routing layer, which effectively complements the 3D splitting technique, making it much more difficult to develop attacks to bypass a brute force approach.

Keywords

Application-specific integrated circuits 3D die stacking Intellectual property protection Trusted computing 

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Copyright information

© Springer-Verlag Berlin Heidelberg (outside the USA) 2017

Authors and Affiliations

  1. 1.Johns Hopkins University Applied Physics LaboratoryLaurelUSA
  2. 2.United States Naval AcademyAnnapolisUSA

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