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Journal of Cryptographic Engineering

, Volume 2, Issue 2, pp 111–127 | Cite as

Higher-order glitch free implementation of the AES using Secure Multi-Party Computation protocols

Extended version
  • Thomas Roche
  • Emmanuel Prouff
Regular Paper

Abstract

Higher-order side channel analysis (HO-SCA) is a powerful technique against cryptographic implementations and the design of appropriate countermeasures is nowadays an important topic. In parallel, another class of attacks, called glitches attacks, have been investigated which exploit the hardware glitches phenomena occurring during the physical execution of algorithms. Some solutions have been proposed to counteract HO-SCA at any order or to defeat glitches attacks, but no work has until now focused on the definition of a sound countermeasure thwarting both attacks. We introduce in this paper a circuit model in which side-channel resistance in the presence of glitches effects can be characterized. This allows us to construct the first glitch free HO-SCA countermeasure. The new construction can be built from any Secure Multi-Party Computation protocol and, as an illustration, we propose to apply the protocol introduced by Ben-Or et al at STOC in 1988. The adaptation of the latter protocol to the context of side-channel analysis results in a completely new higher-order masking scheme, particularly interesting when addressing resistance in the presence of glitches. An application of our scheme to the AES block cipher is detailed, as well as an information theoretic evaluation of the new masking function that we call polynomial masking.

Keywords

Side-channel analysis Higher-order masking scheme Glitch freeness Shamir secret sharing scheme Multi-party computation 

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Copyright information

© Springer-Verlag 2012

Authors and Affiliations

  1. 1.ANSSIParisFrance

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