Influence of Germanium Source Dual Halo Dual Dielectric Triple Material Surrounding Gate Tunnel FET for Improved Analog/RF Performance


This paper investigates the RF Stability performance of the Germanium Source Dual Halo Dual Dielectric Triple Material Surrounding Gate Tunnel FET Ge(SRC)-DH-DD-TM-SG-TFET using 3D - Silvaco Atlas TCAD device simulator. The impact of the geometrical parameter, high-k dielectric material and bias conditions on the key figure of merit (FoM) like Transconductance (gm), Gate capacitance (Cgg) and RF parameters like Stern Stability Factor (K), Critical Frequency (fk) are investigated. The analytical model provides the relation between fk and small signal parameters which provide guidelines for optimizing the device geometrical parameter. The results show improvement in ION current, gm, ft and fk for the optimized device structure. The optimized Ge(SRC)-DH-DD-TM-SG-TFET exhibits fk of 75.0 GHz.

This is a preview of subscription content, log in to check access.

Access options

Buy single article

Instant unlimited access to the full article PDF.

US$ 39.95

Price includes VAT for USA

Subscribe to journal

Immediate online access to all issues from 2019. Subscription will auto renew annually.

US$ 99

This is the net price. Taxes to be calculated in checkout.


  1. 1.

    Reddick WM, Amaratunga GAJ (1995) Silicon surface tunnel transistor. Appl Phys Lett 67(4):494–496

  2. 2.

    Appenzeller J, Lin Y-M, Knoch J, Avouris P (2004) Band-to-band tunneling in carbon nanotube field-effect transistors. Phys Rev Lett 93(19):196805

  3. 3.

    Abadiand RMI, Ziabari SAS (2016) Representation of type I heterostructure junctionless tunnel field effect transistor for high-performance logic application. Appl Phys A Mater Sci Process 122:616–623

  4. 4.

    Bagga N, Dasgupta S (2017). IEEE Trans Electron Devices 64:2

  5. 5.

    Boucart K, Ionescu AM (2007) Double-Gate Tunnel FET With High-$\kappa Gate Dielectric. IEEE Trans. Electron Devices 54(7):1725–1733

  6. 6.

    Molaei Imen Abadi R, Ziabari S (2016) Improved performance of nanoscale junctionless tunnel field-effect transistor based on gate engineering approach. Appl Phys A 122:988.

  7. 7.

    Colinge J-P (2004) Multiple-gate soi mosfets. Solid State Electron 48(6):897–905

  8. 8.

    Vanitha P, Samuel TSA, Nirmal D (2019). AEU-Int J Electron Commu 99:34–39

  9. 9.

    Bhuwalka KK, Sedlmaier S, Ludsteck AK, Tolksdorf C, Schulze J, Eisele I (2004) Vertical tunnel field-effect transistor. IEEE Trans Electron Devices 51(2):279–282

  10. 10.

    Zhang Q, Zhao W, Seabaugh A (2006) Low-subthreshold-swing tunnel transistors. IEEE Electron Device Lett 27(4):297–300

  11. 11.

    Boucart K, Ionescu AM (2007) Length scaling of the double gate tunnel FET with a high-k gate dielectric. Solid State Electron 51(11):1500–1507

  12. 12.

    Madan J, Pandey R, Sharma R, Chaujar R (2019) Impact of metal silicide source electrode on polarity gate induced source in junctionless TFET. Appl Phys A.

  13. 13.

    Damrongplasit N, Kim SH, Liu T-JK (2013) Study of random dopant fluctuation induced variability in the raised-Ge-source TFET. IEEE Electron Device Lett 34(2):184–186

  14. 14.

    Tirkey S, Sharma D, Yadav DS, Yadav S (2017) Analysis of a novel metal implant junctionless tunnel FET for better DC and analog/RF electrostatic parameters. IEEE Trans Electron Devices 64(9):3943–3950

  15. 15.

    Salimian F, Dideban D (2018) A double gate resonant tunneling transistor scheme based on silicene nanotube. Physica E: Low-dimensional Systems and Nanostructures 104:268–274

  16. 16.

    Lee C-W, Afzalian A, Akhavan ND, Yan R, Ferain I, Colinge J-P (2009) Junctionless multigate field-effect transistor. Appl Phys Lett 94(5):053511

  17. 17.

    Bal P, Akram MW, Mondal P, Ghosh B (2013) Performance estimation of sub-30 nm junctionless tunnel FET (JLTFET). J Comput Electron 12(4):782–789

  18. 18.

    Kuo-Hsing Kao ,Anne S. Verhulst, William G. Vandenberghe, Bart Sorée, Guido Groeseneken, Kristin De Meyer. Direct and Indirect Band-to-Band Tunnelingin Germanium-Based TFETs. IEEE Transactions On Electron Devices, Vol. 59, No. 2, 2012

  19. 19.

    Akram MW, Ghosh B (2014) Analog performance of double gate junctionless tunnel field effect transistor. J Semicond 35(7):074001

  20. 20.

    Cecil K, Singh J (2016) Influence of Germanium source on dopingless tunnel-FET for improved analog/RF performance. Superlattices and Microstructures.

  21. 21.

    Nadim Chowdhury, Imtiaz Ahmed, Takian Fakhrul, M. K. Alam, Quazi D. M. Khosru, A low subthreshold swing tunneling field effect transistor for next generation low power CMOS applications, Physica E: Low-dimensional Systems and Nanostructures, Volume 74, 2015, Pages 251–257

  22. 22.

    D Gracia, D Nirmal, A Nisha Justeena Investigation of Ge based double gate dual metal tunnel FET novel architecture using various hetero dielectric materials. Superlattices and Microstructures, Elsevier;2017, 109(154–160)

  23. 23.

    Bal P, Ghosh B, Mondal P, Akram MW, Tripathi BMM (2014) Dual material gate junctionless tunnel field effect transistor. Journal J Comput Electron 13(1):230–234

  24. 24.

    Abadi RMI, Ziabari SAS (2016). Appl Phys A: Mater Sci Process 122(11):988

  25. 25.

    Venkatesh M, Balamurugan NB (2019) New subthreshold performance analysis of germanium based dual halo gate stacked triple material surrounding gate tunnel field effect transistor. Superlattices and Microstructures-Elsevier 130:485–498

  26. 26.

    Roobert AA, Rani DGN (2019) Design and analysis of 0.9 and 2.3-GHz concurrent dual-band CMOS LNA for mobile communication. Int J Circ Theor Appl:1–14.

  27. 27.

    Silvaco, Version 5.15.32.R., 2009. [Online]. Available

  28. 28.

    Hänsch W, Vogelsang T, Kircher R, Orlowski M (1989) Carrier transport near the Si/SiO2 interface of a MOSFET. Solid State Electron 32(10):839–849

  29. 29.

    Venkatesh M, Suguna M, Balamurugan NB (2019) Subthreshold performance analysis of germanium source dual halo dual dielectric triple material surrounding gate tunnel field effect transistor for ultra low power applications. Journal of Electronic Materials -Springer 48:6724–6734.

  30. 30.

    Schenk, A. A model for the field and temperature dependence of Shockley-Read-Hall lifetimes in silicon. Solid State Electron 1992; 35(11)

  31. 31.

    Sarkar A, Das AK, De S, Sarkar CK (2012) Effect of gate engineering in double-gate MOSFETs for analog/RF applications. Microelectron J 43(11):873–882

  32. 32.

    Ku WH (1966) Unilateral gain and stability criterion of active two-ports in terms of scattering parameters. Proc IEEE 54(11):1617–1618

  33. 33.

    Lide, David R. CRC Handbook of Chemistry and Physics CRC. Boca Raton 2008

  34. 34.

    Rollett J (1962) Stability and power-gain invariants of linear two ports. IRE Trans Circuit Theory 9(1):29–32

  35. 35.

    Rahi SB, Ghosh B (2015) High-k double gate junctionless tunnel FET with a tunable bandgap. RSC Adv 5(67):54544–54550

Download references

Author information

Correspondence to M. Venkatesh.

Additional information

Publisher’s Note

Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.

Rights and permissions

Reprints and Permissions

About this article

Verify currency and authenticity via CrossMark

Cite this article

Venkatesh, M., Suguna, M. & Balamurugan, N.B. Influence of Germanium Source Dual Halo Dual Dielectric Triple Material Surrounding Gate Tunnel FET for Improved Analog/RF Performance. Silicon (2020) doi:10.1007/s12633-020-00385-6

Download citation


  • Halo doping
  • Germanium source
  • RF stability
  • Surrounding gate TFET
  • Analog FOMs