Nano Research

, Volume 8, Issue 3, pp 980–989 | Cite as

Tunnel junctions in a III–V nanowire by surface engineering

  • Salman Nadar
  • Chloé Rolland
  • Jean-François Lampin
  • Xavier Wallart
  • Philippe Caroff
  • Renaud Leturcq
Research Article


We demonstrate a simple way of fabricating high performance tunnel devices from p-doped InAs nanowires by tailoring the n-doped surface accumulation layer inherent to InAs surfaces. By using appropriate ammonium sulfide based surface passivation before metallization without any further thermal treatment, we demonstrate characteristics of tunnel p-n junctions, namely Esaki and backward diodes, with figures of merit better than previously published for InAs homojunctions. The further optimization of both the surface doping, in a quantitative way, and the device geometry allows us to demonstrate that these nanowire-based technologically-simple diodes have promising direct current characteristics for integrated high frequency detection or generation.


semiconductor nanowire tunnel junction indium arsenide compounds doping III-V semiconductors 


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Copyright information

© Tsinghua University Press and Springer-Verlag Berlin Heidelberg 2015

Authors and Affiliations

  • Salman Nadar
    • 1
  • Chloé Rolland
    • 1
  • Jean-François Lampin
    • 1
  • Xavier Wallart
    • 1
  • Philippe Caroff
    • 1
    • 2
  • Renaud Leturcq
    • 1
    • 3
  1. 1.ISEN DepartmentInstitute of Electronics Microelectronics and Nanotechnology, CNRS-UMR 8520Villeneuve d’Ascq CedexFrance
  2. 2.Department of Electronic Materials Engineering, Research School of Physics and EngineeringThe Australian National UniversityCanberraAustralia
  3. 3.Département Science et Analyse des MatériauxCentre de Recherche Public-Gabriel LippmannBelvauxLuxembourg

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