Nano Research

, Volume 1, Issue 1, pp 9–21 | Cite as

Development of ultra-high density silicon nanowire arrays for electronics applications

Open Access
Review Article


This article reviews our recent progress on ultra-high density nanowires (NWs) array-based electronics. The superlattice nanowire pattern transfer (SNAP) method is utilized to produce aligned, ultra-high density Si NW arrays. We fi rst cover processing and materials issues related to achieving bulk-like conductivity characteristics from 10 20 nm wide Si NWs. We then discuss Si NW-based fi eld-effect transistors (FETs). These NWs & NW FETs provide terrifi c building blocks for various electronic circuits with applications to memory, energy conversion, fundamental physics, logic, and others. We focus our discussion on complementary symmetry NW logic circuitry, since that provides the most demanding metrics for guiding nanofabrication. Issues such as controlling the density and spatial distribution of both p-and n-type dopants within NW arrays are discussed, as are general methods for achieving Ohmic contacts to both p-and n-type NWs. These various materials and nanofabrication advances are brought together to demonstrate energy effi cient, complementary symmetry NW logic circuits.


Ultra-high density nanowire superlattice nanowire pattern transfer logic circuit 


  1. [1]
    Lieber, C. M. Nanoscale science and technology: building a big future from small things. MRS Bull. 2003, 28, 486–491.Google Scholar
  2. [2]
    Xia, Y. N.; Yang, P. D. Chemistry and physics of nanowires. Adv. Mater. 2003, 15, 351.CrossRefGoogle Scholar
  3. [3]
    Yang, P. D. The chemistry and physics of semiconductor nanowires. MRS Bull. 2005, 30, 85–91.Google Scholar
  4. [4]
    The international technology roadmap for semiconductors (ITRS): process integration, devices, and structures (Semiconductor Industry Association, San Jose, California, 2005).
  5. [5]
    Maier, S. A.; Brongersma, M. L.; Kik, P. G.; Meltzer, S.; Requicha, A. A. G.; Atwater, H. A. Plasmonics A route to nanoscale optical devices. Adv. Mater. 2001, 13, 1501.CrossRefGoogle Scholar
  6. [6]
    Brus, L. Electronic wave-functions in semiconductor clusters Experiment and theory. J. Phys. Chem. 1986, 90, 2555–2560.CrossRefGoogle Scholar
  7. [7]
    Caruso, F. Nanoengineering of particle surfaces. Adv. Mater. 2001, 13, 11.CrossRefGoogle Scholar
  8. [8]
    Wang, D. W.; Chang, Y. L.; Wang, Q.; Cao, J.; Farmer, D. B.; Gordon, R.G.; Dai, H. J. Surface chemistry and electrical properties of germanium nanowires. J. Am. Chem. Soc. 2004, 126, 11602–11611.CrossRefGoogle Scholar
  9. [9]
    Bunimovich, Y. L.; Shin, Y. S.; Yeo, W. S.; Amori, M.; Kwong, G.; Heath, J. R. Quantitative real-time measurements of DNA hybridization with alkylated nonoxidized silicon nanowires in electrolyte solution. J. Am. Chem. Soc. 2006, 128, 16323–16331.CrossRefGoogle Scholar
  10. [10]
    Lieber, C. M. Nanoscale science and technology: Building a big future from small things. MRS Bull. 2003, 28, 486–491.Google Scholar
  11. [11]
    Lauhon, L. J.; Gudiksen, M. S.; Wang, C. L.; Lieber, C. M. Epitaxial core-shell and core-multishell nanowire heterostructures. Nature 2002, 420, 57–61.CrossRefGoogle Scholar
  12. [12]
    Gudiksen, M. S.; Lauhon, L. J.; Wang, J.; Smith, D. C.; Lieber, C. M. Growth of nanowire superlattice structures for nanoscale photonics and electronics. Nature 2002, 415, 617–620.CrossRefGoogle Scholar
  13. [13]
    Wang, D.; Qian, F.; Yang, C.; Zhong, Z. H.; Lieber, C. M. Rational growth of branched and hyperbranched nanowire structures. Nano Lett. 2004, 4, 871–874.CrossRefGoogle Scholar
  14. [14]
    Xia, Y. N.; Yang, P. D.; Sun, Y. G.; Wu, Y. Y.; Mayers, B.; Gates, B.; Yin, Y. D.; Kim, F.; Yan, Y. Q. One-dimensional nanostructures: Synthesis, characterization, and applications. Adv. Mater. 2003, 15, 353–389.CrossRefGoogle Scholar
  15. [15]
    Jin, S.; Whang, D. M.; Mcalpine, M. C.; Friedman, R. S.; Wu, Y.; Lieber, C. M. Scalable interconnection and integration of nanowire devices without registration. Nano Lett. 2004, 4, 915–919.CrossRefGoogle Scholar
  16. [16]
    Wang, D. W.; Chang, Y. L.; Liu, Z.; Dai, H. J. Oxidation resistant germanium nanowires: Bulk synthesis, long chain alkanethiol functionalization, and Langmuir-Blodgett assembly. J. Am. Chem. Soc. 2005, 127, 11871–11875.CrossRefGoogle Scholar
  17. [17]
    Javey, A.; Nam, S.; Friedman, R. S.; Yan, H.; Lieber, C. M. Layer-by-layer assembly of nanowires for threedimensional, multifunctional electronics. Nano Lett. 2007, 7, 773–777.CrossRefGoogle Scholar
  18. [18]
    Boukai, A. I.; Bunimovich, Y.; Tahir-Kheli, J.; Yu, J.-K.; Goddard III, W.A.; Heath, J.R. Silicon nanowires as efficient thermoelectric materials. Nature 2008, 451, 168–171.CrossRefGoogle Scholar
  19. [19]
    Hochbaum, A. I.; Chen, R.; Delgado, R. D.; Liang, W.; Garnett, E. C.; Najarian, M.; Majumdar, A.; Yang, P. Enhanced thermoelectric performance of rough silicon nanowires. Nature 2008, 451, 163–167.CrossRefGoogle Scholar
  20. [20]
    Wang, D. W.; Sheriff, B. A.; Heath, J. R. Silicon p-FETs from ultrahigh density nanowire arrays. Nano Lett. 2006, 6, 1096–1100.CrossRefGoogle Scholar
  21. [21]
    Wang, D. W.; Sheriff, B. A.; Heath, J. R. Complementary symmetry silicon nanowire logic: Power-efficient inverters with gain. Small 2006, 2, 1153–1158.CrossRefGoogle Scholar
  22. [22]
    Liu, B. Z.; Wang, Y. F.; Dilts, S.; Mayer, T. S.; Mohney, S. E. Silicidation of silicon nanowires by platinum. Nano Lett. 2007, 7, 818–824.CrossRefGoogle Scholar
  23. [23]
    Wang, D. W.; Sheriff, B. A.; Heath, J. R.; Kurtin, J. N. Complementary symmetry nanowire logic circuits: Experimental demonstrations and in silico optimizations. ACS Nano 2008, revised, acceptance pending.Google Scholar
  24. [24]
    Melosh, N. A.; Boukai, A.; Diana, F.; Gerardot, B.; Badolato, A.; Petroff, P. M.; Heath, J. R. Ultrahigh-density nanowire lattices and circuits. Science 2003, 300, 112–115.CrossRefGoogle Scholar
  25. [25]
    Beckman, R. A.; Johnston-Halperin, E.; Melosh, N. A.; Luo, Y.; Green, J. E.; Heath, J. R. Fabrication of conducting Si nanowire arrays. J. Appl. Phys. 2004, 96, 5921–5923.CrossRefGoogle Scholar
  26. [26]
    Yu, H. B.; Webb, L. J.; Ries, R. S.; Solares, S. D.; Goddard, W. A.; Heath, J. R.; Lewis, N. S. Low-temperature STM images of methyl-terminated Si (111) surfaces. J. Phys. Chem. B 2005, 109, 671–674.CrossRefGoogle Scholar
  27. [27]
    Solares, S. D.; Yu, H. B.; Webb, L. J.; Lewis, N. S.; Heath, J. R.; Goddard, W. A. Chlorination-methylation of the hydrogen-terminated silicon (111) surface can induce a stacking fault in the presence of etch pits. J. Am. Chem. Soc. 2006, 128, 3850–3851.CrossRefGoogle Scholar
  28. [28]
    Green, J. E.; Wong, S. J.; Heath, J. R. Hall mobility measurements and chemical stability of ultrathin, methylated Si (111)-on-insulator films. J. Phy. Chem. C 2008, 112, 5185–5189.CrossRefGoogle Scholar
  29. [29]
    Cui, Y.; Zhong, Z. H.; Wang, D. L.; Wang, W. U.; Lieber, C. M. High performance silicon nanowire field effect transistors. Nano Lett. 2003, 3, 149–152.CrossRefGoogle Scholar
  30. [30]
    Mcalpine, M. C.; Friedman, R. S.; Jin, S.; Lin, K. H.; Wang, W. U.; Lieber, C. M. High-performance nanowire electronics and photonics on glass and plastic substrates. Nano Lett. 2003, 3, 1531–1535.CrossRefGoogle Scholar
  31. [31]
    Menard, E.; Nuzzo, R. G.; Rogers, J. A. Bendable single crystal silicon thin film transistors formed by printing on plastic substrates. Appl. Phys. Lett. 2005, 86, 093507.CrossRefGoogle Scholar
  32. [32]
    Zhu, Z. T.; Menard, E.; Hurley, K.; Nuzzo, R. G.; Rogers, J. A. Spin on dopants for high-performance single-crystal silicon transistors on flexible plastic substrates. Appl. Phys. Lett. 2005, 86, 133507.CrossRefGoogle Scholar
  33. [33]
    Sze, S. M. Physics of Semiconductor Devices; Wiley: New York, 1981.Google Scholar
  34. [34]
    Wolf, S.; Tauber, R. N. Silicon Processing for the VLSI Era, 2nd ed.; Lattice Press: Sunset Beach, CA, 2000.Google Scholar
  35. [35]
    Beckman, R.; Johnston-Halperin, E.; Luo, Y.; Green, J. E.; Heath, J. R. Bridging dimensions: Demultiplexing ultrahigh-density nanowire circuits. Science 2005, 310, 465 468.Google Scholar
  36. [36]
    Javey, A.; Guo, J.; Paulsson, M.; Wang, Q.; Mann, D. Lundstrom, M.; Dai, H. J. High-field quasiballistic transport in short carbon nanotubes. Phys. Rev. Lett. 2004, 92.Google Scholar
  37. [37]
    Koo, S. M.; Li, Q.; Monica, D. E.; Richter, C. A.; Vogel, E. M. Enhanced channel modulation in dual-gated silicon nanowire transistors. Nano Lett. 2005, 5, 2519 2523.CrossRefGoogle Scholar
  38. [38]
    Mcalpine, M. C.; Ahmad, H.; Wang, D.; Heath, J. R. Highly ordered nanowire arrays on plastic substrates for ultrasensitive flexible chemical sensors. Nat. Mater. 2007, 6, 379–384.CrossRefGoogle Scholar
  39. [39]
    Mcalpine, M. C.; Friedman, R. S.; Lieber, C. M. Highperformance nanowire electronics and photonics and nanoscale patterning on flexible plastic substrates. Proc. IEEE 2005, 93, 1357–1363.CrossRefGoogle Scholar
  40. [40]
    Rabaey, J. M.; Chandrakasan, A.; Nikolic, B. Digital Integrated Circuits: A Design Perspective, 2nd ed.; Pearson Education, Inc.: Upper Saddle River, NJ, 2003.Google Scholar
  41. [41]
    Cui, Y.; Lieber, C. M. Functional nanoscale electronic devices assembled using silicon nanowire building blocks. Science 2001, 291, 851–853.CrossRefGoogle Scholar
  42. [42]
    Huang, Y.; Duan, X. F.; Cui, Y.; Lauhon, L. J.; Kim, K. H.; Lieber, C. M. Logic gates and computation from assembled nanowire building blocks. Science 2001, 294, 1313–1317.CrossRefGoogle Scholar
  43. [43]
    Chen, Z. H.; Appenzeller, J.; Lin, Y. M.; Sippel-Oakley, J.; Rinzler, A. G.; Tang, J. Y.; Wind, S. J.; Solomon, P. M.; Avouris, P. An integrated logic circuit assembled on a single carbon nanotube. Science 2006, 311, 1735.CrossRefGoogle Scholar
  44. [44]
    Javey, A.; Wang, Q.; Ural, A.; Li, Y. M.; Dai, H. J. Carbon nanotube transistor arrays for multistage complementary logic and ring oscillators. Nano Lett. 2002, 2, 929–932.CrossRefGoogle Scholar
  45. [45]
    Chen, Y.; Jung, G. Y.; Ohlberg, D. A. A.; Li, X. M.; Stewart, D. R.; Jeppesen, J. O.; Nielsen, K. A.; Stoddart, J. F.; Williams, R. S. Nanoscale molecular-switch crossbar circuits. Nanotechnology 2003, 14, 462–468.CrossRefGoogle Scholar
  46. [46]
    Chau, R.; Datta, S.; Doczy, M.; Doyle, B.; Jin, J.; Kavalieros, J.; Majumdar, A.; Metz, M.; Radosavljevic, M. Benchmarking nanotechnology for high-performance and low-power logic transistor applications. IEEE T. Nanotechnol. 2005, 4, 153–158.CrossRefGoogle Scholar
  47. [47]
    Zheng, G. F.; Lu, W.; Jin, S.; Lieber, C. M. Synthesis and fabrication of high-performance n-type silicon nanowire transistors. Adv. Mater. 2004, 16, 1890–1893.CrossRefGoogle Scholar
  48. [48]
    Wang, D. W.; Chang, Y. L.; Wang, Q.; Cao, J.; Farmer, D. B.; Gordon, R. G.; Dai, H. J. Surface chemistry and electrical properties of germanium nanowires. J. Am. Chem. Soc. 2004, 126, 11602–11611.CrossRefGoogle Scholar
  49. [49]
    Duan, X. F.; Niu, C. M.; Sahi, V.; Chen, J.; Parce, J. W.; Empedocles, S.; Goldman, J. L. High-performance thinfilm transistors using semiconductor nanowires and nanoribbons. Nature 2003, 425, 274–278.CrossRefGoogle Scholar
  50. [50]
    Kingston, R. H. Semiconductor Surface Physics University of Pennsylvania Press: Philadelphia, 1957.Google Scholar
  51. [51]
    Xu, K.; Heath, J. R. Controlled fabrication and electrical properties of long quasi-one-dimensional superconducting nanowire arrays. Nano Lett. 2008, 8, 136–141.CrossRefGoogle Scholar
  52. [52]
    Xu, K.; Heath, J. R. submitted, 2008.Google Scholar
  53. [53]
    Bindal, A.; Hamedi-Hagh, S. The impact of silicon nanowire technology on the design of single-work-function CMOS transistors and circuits. Nanotechnology 2006, 17, 4340–4351.CrossRefGoogle Scholar
  54. [54]
    Green, J. E.; Wook Choi, J.; Boukai, A.; Bunimovich, Y.; Johnston-Halperin, E.; Deionno, E.; Luo, Y.; Sheriff, B.A.; Xu, K.; Shik Shin, Y.; Tseng, H.-R.; Stoddart, J. F.; Heath, J. R. A 160-kilobit molecular electronic memory patterned at 1011 bits per square centimetre. Nature 2007, 445, 414–417.CrossRefGoogle Scholar
  55. [55]
    Horowitz, P.; Hill, W. The Art of Electronics. Cambridge: Cambridge University Press, 1989.Google Scholar
  56. [56]
    Wang, D. W.; Wang, Q.; Javey, A.; Tu, R.; Dai, H. J.; Kim, H.; Mcintyre, P. C.; Krishnamohan, T.; Saraswat, K. C. Germanium nanowire field-effect transistors with SiO2 and high-kappa HfO2 gate dielectrics. Appl. Phys. Lett. 2003, 83, 2432–2434.CrossRefGoogle Scholar

Copyright information

© Tsinghua Press and Springer-Verlag GmbH 2008

Authors and Affiliations

  1. 1.Department of ChemistryBoston CollegeChestnut Hill, MAUSA
  2. 2.Division of Chemistry and Chemical Engineering and the Kavli Nanoscience CenterPasadena, CAUSA

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