A contribution to the reduction of the dynamic power dissipation in the turbo decoder

  • Haisheng Liu
  • Christophe Jego
  • Emmanuel Boutillon
  • Michel Jezequel
  • Jean-Philippe Diguet


In the field of mobile communication systems, the energy issue of a turbo decoder becomes an equivalent constraint as throughput and performance. This paper presents a contribution to the reduction of the power consumption in the turbo decoder. The main idea is based on re-encoding technique combined with dummy insertion during the iterative decoding process. This technique, named “toward zero path” (TZP) helps in reducing the state transition activity of the Max-Log-MAP algorithm by trying to maintain the survivor path on the ‘zero path’ of the trellis. The design of a turbo decoder based on the TZP technique, associated with different power reduction technique (saturation of state metrics, stoping criterium) is described. The resulting turbo decoder was implemented onto a Xilinx VirtexII-Pro field-programmable gate array (FPGA) in a digital communication experimental setup. Performance and accurate power dissipation measurements have been done thanks to dynamic partial reconfiguration of the FPGA device. The experimental results have shown the interest of the different contributions for the design of turbo decoders.


Turbo codes Max-Log-MAP algorithm Re-encoding technique Energy efficient architecture FPGA prototyping 


  1. 1.
    Berrou C, Glavieux A, Thitimajshima P (1993) Near shannon limit error-correcting coding and decoding: Turbo-codes. 1. In: IEEE international conference on communications, 1993, ICC 93. Geneva. Technical Program, Conference Record, vol 2, pp 1064–1070Google Scholar
  2. 2.
    Bougard B (2006) Cross-layer energy management in broadband wireless transceivers. Ph.D. thesis, Katholieke Universiteit LeuvenGoogle Scholar
  3. 3.
    Hagenauer J, Offer E, Papke L (1996) Iterative decoding of binary block and convolutional codes. IEEE Trans Inf Theory 42(2):429–445MATHCrossRefGoogle Scholar
  4. 4.
    Benedetto S, Divsalar D, Montorsi G, Pollara F (1997) A soft-input soft-output app module for iterative decoding of concatenated codes. IEEE Commun Lett 1(1):22–24CrossRefGoogle Scholar
  5. 5.
    Garrett D, Xu B, Nicol C (2001) Energy efficient turbo decoding for 3g mobile. In: International symposium on low power electronics and design, pp 328–333Google Scholar
  6. 6.
    Schurgers C, Catthoor F, Engels M (2001) Memory optimization of map turbo decoder algorithms. IEEE trans very large scale integr (VLSI) Syst 9(2):305–312CrossRefGoogle Scholar
  7. 7.
    Bahl L, Cocke J, Jelinek F, Raviv J (1974) Optimal decoding of linear codes for minimizing symbol error rate (corresp.). IEEE Trans Inf Theory 20(2):284–287MathSciNetMATHCrossRefGoogle Scholar
  8. 8.
    Robertson P, Villebrun E, Hoeher P (1995) A comparison of optimal and sub-optimal map decoding algorithms operating in the log domain. ICC’95, vol 2, pp 1009–1013. SeattleGoogle Scholar
  9. 9.
    Boutillon E, Douillard C, Montorsi G (2007) Iterative decoding of concatenated convolutional codes: implementation issues. Proc. IEEE 95(6):1201–1227CrossRefGoogle Scholar
  10. 10.
    Welch LR, Berlekamp ER (1986) Error correction for algebraic block codes. U.S. Patent # 46,33,470Google Scholar
  11. 11.
    Kubota S, Ohtani K, Kato S (1986) High-speed and high-coding-gain viterbi decoder with low power consumption employing sst (scarce state transition) scheme. Electron Lett 22(9):491–493, 24CrossRefGoogle Scholar
  12. 12.
    Lin L, Tsui CY, Cheng RS (1997) Low power soft output viterbi decoder scheme for turbo code decoding. In: Proceedings of 1997 IEEE international symposium on circuits and systems, 1997. ISCAS ’97., vol 2, pp 1369–1372Google Scholar
  13. 13.
    Gross WJ, Kschischang FR, Koetter R, Gulak RG (2002) A vlsi architecture for interpolation in soft-decision list decoding of Reed–Solomon codes. In: IEEE workshop on Signal Processing Systems, 2002. (SIPS ’02), pp 39–44Google Scholar
  14. 14.
    Weiss C, Bettstetter C, Riedel S, Costello Jr DJ (1998) Turbo decoding with tail-biting trellises. In: International symposium on signals, systems, and electronics, ISSSE 98. 1998 URSI, pp 343–348Google Scholar
  15. 15.
    Liu H, Diguet J-P, Jego C, Jezequel M, Boutillon E (2007) Energy efficient turbo decoder with reduced state metric quantization. In: IEEE workshop on signal processing systems, 2007, pp 237–242Google Scholar
  16. 16.
    Gilbert F, Kienle F, Wehn N (2003) Low complexity stopping criteria for umts turbo-decoders. In: The 57th IEEE semiannual Vehicular Technology Conference, 2003. VTC 2003-Spring, vol 4, pp 2376–2380Google Scholar
  17. 17.
    Danger J-L, Ghazel A, Boutillon E, Laamari H (2000) Efficient FPGA implementation of gaussian noise generator for communication channel emulation. In: The 7th IEEE international conference on electronics, circuits and systems, 2000. ICECS 2000, vol 1, pp 366–369Google Scholar

Copyright information

© Institut Télécom and Springer-Verlag 2011

Authors and Affiliations

  • Haisheng Liu
    • 1
    • 2
  • Christophe Jego
    • 3
  • Emmanuel Boutillon
    • 2
  • Michel Jezequel
    • 1
  • Jean-Philippe Diguet
    • 2
  1. 1.CNRS Lab-STICCInstitut Telecom/Telecom BretagneBrestFrance
  2. 2.CNRS Lab-STICCUniversité de Bretagne SudLorientFrance
  3. 3.CNRS IMSIPB/Enseirb-MatmecaBordeauxFrance

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