Abstract
We demonstrated the feasibility of using InP (100) substrates, a different indium source, for the synthesis of In2O3 nanowires by the vapor–liquid–solid (VLS) method using a 20-nm-thick Au layer as a catalyst. By varying the thickness of the Au layer and the growth temperature (T), the nanowires showed different morphologies. The nanowires grew along the (100) direction and had perfect crystallinity and lengths up to several hundreds of micrometers. The configured field-effect transistor revealed an n-type behavior with 115 μA of the drain-source current, IDS, under 1.0 V of gate voltage, VDS, at 1.33 × 10−4 kPa of pressure and temperature of 20°C. This result indicates that it is feasible to use different In sources to synthesize In2O3 nanowires by the VLS method for electronic devices.
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Acknowledgments
This research was partially supported by Basic Science Research Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Education (2020R1I1A3A04037241) and Graduate University of Science and Technology, Vietnam Academy of Science and Technology (grant no. GUST.STS.ÐT2020-HH10).
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Ngo, V.D., Nguyen, T.D., Nguyen, T.T. et al. Field-Effect Transistor Behavior of Synthesized In2O3/InP (100) Nanowires via the Vapor–Liquid–Solid Method. J. Electron. Mater. 50, 59–64 (2021). https://doi.org/10.1007/s11664-020-08548-2
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DOI: https://doi.org/10.1007/s11664-020-08548-2